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Digital-to-analog converter for reducing glitches of output switch and method

A digital-to-analog converter, output switch technology, applied in the direction of digital-to-analog converter, analog/digital conversion, code conversion, etc., can solve the problems of large glitch, small glitch, output glitch, etc., to achieve smooth output and reduce output glitch , the effect of improving the accuracy

Inactive Publication Date: 2019-03-26
CHANGZHOU INST OF TECH
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

In order to reduce switching noise, the usual binary code will bring a large short-term waveform change when the code is switched, that is, the output will have glitches (Glitch). In order to reduce the output glitch, thermometer coding is usually used, but the thermometer When the output amplitude of the encoding changes small, the glitch is small; when the output amplitude changes greatly, the glitch is large

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  • Digital-to-analog converter for reducing glitches of output switch and method
  • Digital-to-analog converter for reducing glitches of output switch and method
  • Digital-to-analog converter for reducing glitches of output switch and method

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Embodiment Construction

[0052] The present invention will be described in further detail below in conjunction with the accompanying drawings.

[0053] The invention adopts the mode of multi-phase clock to control the switching current source to reduce the influence of the switching noise, thereby reducing the magnitude of the switching burr, which is more conducive to the filter to generate an accurate output smooth voltage curve, and improves the performance of the DAC.

[0054] The core of the present invention is to use a multi-phase clock. In order to better illustrate the core idea of ​​the present invention, a 4-phase clock is used as an example for discussion. During actual use, clocks from 1 phase to n phases can be set, where n= 1, 2, 3, ..., select more clock phases according to different application occasions, and the present invention is applicable to binary coding, temperature coding, segment coding and other coding methods commonly used in DAC.

[0055] 1. Digital-to-analog converter (D...

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Abstract

The invention discloses a digital-to-analog converter for reducing glitches of an output switch and a method. The digital-to-analog converter comprises: an input register, which is used for input buffering of digital signals; a column encoder, which performs column coding for each quadrant to control the switching sequence of a current source array; a row encoder, which performs row coding for each quadrant to control the switching sequence of the current source array; a latch, which latches a switching signal; a switching current source array, which arranges the switching current source arrayin each quadrant; and multi-phase clock generator, which generates a clock unit with multiple phases and enhances the driving effect. The invention distributes the glitch power of the edge of the switch through the multi-phase clock, thereby reducing the influence of the output glitch on the accuracy of the DAC; fully filters out high frequency noises after filtering, so that the output is smoother; reduces two-dimensional gradient errors and symmetry errors, and improves the accuracy of the DAC by four-limit central symmetric arrangement of the switching current source array and the symmetric control of switching sequences.

Description

technical field [0001] The invention relates to a digital-to-analog converter, in particular to a digital-to-analog converter for reducing output switching burrs, and belongs to the technical field of integrated circuit design and testing. Background technique [0002] Traditional switching current mode digital-to-analog converter (DAC) is mainly affected by two kinds of errors, namely gradient error and symmetry error. In the paper Yasuyuki Nakamura, Takahiro Miki, Atsushi Maeda, Harufusa Kondoh, and Nobuharu Yazawa, "A10-b 70-MS / s CMOS D / A Converter" IEEE Journal of Solid-State Circuits, vol.26, No.4, April 1991, etc. have more detailed discussion, and subsequent digital-to-analog converters are designed with this structure. The main error elimination method is to use the "level symmetrical switch array" method, which divides the switch array into four quadrants. When the output increases sequentially, a centrally symmetrical switching sequence is adopted between the qua...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M1/06H03M1/08H03M1/66
CPCH03M1/0631H03M1/0836H03M1/66
Inventor 韩益锋俞伟钧张维吴文桃朱敏芬
Owner CHANGZHOU INST OF TECH