Three-dimensional integrated circuit heat dissipation system using TSV and RDL

A technology for integrated circuits and heat dissipation systems, applied in circuits, electrical components, electric solid devices, etc., can solve the problems of uneven heat dissipation of three-dimensional integrated circuits and large chip temperature gradients, achieve large coverage, improve heat dissipation efficiency, and improve heat dissipation. The effect of efficiency

Inactive Publication Date: 2019-03-29
XIAN UNIV OF TECH
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  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

[0004] The purpose of the present invention is to provide a three-dimensional integrated circuit heat dissipation system using TSV and RDL to solve the problems of uneven heat dissipation and excessive internal temperature gradient of the existing three-dimensional integrated circuit

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  • Three-dimensional integrated circuit heat dissipation system using TSV and RDL
  • Three-dimensional integrated circuit heat dissipation system using TSV and RDL

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Embodiment Construction

[0019] The present invention will be described in further detail below in conjunction with the accompanying drawings and specific embodiments, but the present invention is not limited to the specific embodiments.

[0020] refer to figure 1 and figure 2 , the present invention is a three-dimensional integrated circuit heat dissipation system using TSV and RDL, wherein the three-dimensional integrated circuit 1 includes a bonding layer 11, a silicon substrate 10 and an active region 8 that are sequentially stacked, and the bonding layer can shield external interference, Improve the stability of the circuit; the silicon substrate is used to carry the active area to form an integrated circuit; functional devices such as transistors are distributed in the active area, which belongs to the core part of the integrated circuit.

[0021] A dielectric layer 9 is deposited on the surface of the silicon substrate 10, and a metal line 6 for absorbing heat in the active area 8 is deposite...

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Abstract

The invention discloses a three-dimensional integrated circuit heat dissipation system using TSV and RDL. The three-dimensional integrated circuit comprises a bonding layer, a silicon substrate and anactive region which are sequentially stacked. The system is characterized in that a surface of the silicon substrate is deposited with a dielectric layer. A metal line for absorbing heat of the active region is deposited in the dielectric layer. A thermal conduction silicon through-hole connected to the metal line is disposed in the silicon substrate and the dielectric layer, and the thermal conduction silicon through-hole vertically passes through the dielectric layer. Through arranging the metal line and the thermal conduction silicon through-hole in a three-dimensional integrated circuit,the heat dissipation system makes heat dissipation of the three-dimensional integrated circuit uniform, so as to reduce internal temperature gradient of a chip, and improving performance stability ofthe three-dimensional integrated circuit.

Description

technical field [0001] The invention belongs to the technical field of three-dimensional integrated circuit heat dissipation, and in particular relates to a three-dimensional integrated circuit heat dissipation system using TSV and RDL. Background technique [0002] With the continuous development of the integrated circuit industry, the size of microelectronic devices continues to decrease in accordance with Moore's Law, and the degree of integration continues to increase. Nowadays, planar integrated circuits can no longer meet the needs of further reduction in device size, and three-dimensional integrated circuits have emerged as the times require. The three-dimensional integrated circuit adopts chip stacking technology, which effectively saves space. Using redistribution layer (RDL) technology, metal layers and dielectric layers are deposited on the surface of the wafer to form corresponding metal wiring, which improves the internal circuit layout. Through silicon vias (TS...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/48H01L23/485H01L23/367
CPCH01L23/367H01L23/481H01L23/482H01L2224/02331H01L2224/02381
Inventor 王凤娟李玥余宁梅
Owner XIAN UNIV OF TECH
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