Gigabit Ethernet DMA data transmission design device based on FPGA

A Gigabit Ethernet and data transmission technology, applied in the field of airborne data recording, can solve the problems of low data processing capacity of the network interface, large data volume, and increased development cost of airborne recording equipment, so as to reduce the readback unloading time, Improve work efficiency and reduce processing delay

Inactive Publication Date: 2019-04-16
LUOYANG INST OF ELECTRO OPTICAL EQUIP OF AVIC
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Problems solved by technology

However, limited by the low data processing capability of the network interface, Ethernet is usually only used for debugging of electronic modules and loading of application programs on airborne electronic equipment.
In the environment of airborne recording equipment, the amount

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  • Gigabit Ethernet DMA data transmission design device based on FPGA

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Embodiment Construction

[0017] The present invention will be further described below in conjunction with the accompanying drawings and embodiments.

[0018] The device of the invention is applied to a certain type of airborne data recording equipment, and realizes fast unloading of recorded data through a Gigabit Ethernet interface. When the data is unloaded, the command communication between the data recording device and the unloading device is realized through the Ethernet TCP / IP protocol, and the data transmission is realized through the Ethernet UDP / IP protocol.

[0019] The present invention is based on the Virtex5 series FPGA of Xilinx Company, utilizes its internally integrated PowerPC440 processor and three-rate Ethernet media access controller (EMAC for short), adopts DDR2 SDRAM memory and Ethernet physical layer interface transceiver (abbreviated as PHY) outside, Realize high-speed data transmission of Gigabit Ethernet. FPGA-based Gigabit Ethernet DMA data transmission design device, the i...

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Abstract

The invention provides a gigabit Ethernet DMA data transmission design device based on FPGA. The device comprises the following steps: after an Ethernet medium access controller receives data from a physical layer interface transceiver, writing the data into a receiving FIFO (First In First Out) cache, sending an interrupt request to a processor by the receiving FIFO cache, and sending an LL-DMA by the processor; DMA controller generates descriptor instructions, LL-DMA controller reading RX-FIFO cached data, data is written into the DDR2 SDRAM memory through the DDR2 interface controller. According to the method, the processing delay caused by the fact that a CPU participates in data migration in a traditional mode is reduced; According to the invention, the transmission rate of the Ethernet link is improved, so that in the transmission process of the gigabit Ethernet network, the utilization efficiency of the network link reaches 80%, the read-back unloading time of the data recordingequipment is greatly reduced, and the work efficiency of task data analysis and information judgment by the troop external field is improved.

Description

technical field [0001] The invention relates to the field of airborne data recording, in particular to an Ethernet DMA data transmission design device. Background technique [0002] At present, the commercial Gigabit Ethernet technology is mature, with the characteristics of stability, reliability, fast transmission speed, and long transmission distance, and it is gradually applied to the interconnection of airborne electronic equipment and its testing equipment. However, due to the low data processing capability of the network interface, Ethernet is usually only used for debugging of electronic modules and loading of application programs on airborne electronic equipment. In the environment of airborne recording equipment, the amount of data is large, and the demand for real-time transmission is urgent. If offline recording card data is unloaded, special unloading equipment and processing software are required, which will greatly increase the development cost of airborne rec...

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Application Information

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IPC IPC(8): G06F13/28
CPCG06F13/28
Inventor 祁超董永峰
Owner LUOYANG INST OF ELECTRO OPTICAL EQUIP OF AVIC
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