Double time interleaving current-steering-type DAC (digital-to-analog converter) with DRRZ (digital random retum-to-zero) correction function

Abstract

The invention belongs to the field of digital-to-analog conversion, and discloses a double time interleaving current-steering-type DAC (digital-to-analog converter) with a DRRZ (digital random retum-to-zero) correction function. Clock signals are utilized to control two DACs to alternately work in a DDRZ correction mode and a data output mode; in the first half of a clock cycle, a first DAC carries out random dynamic zeroing, corrects a high current source unit, and is connected with a virtual end through a DAC output control logic module, and at the same time, a second DAC carries out digital-to-analog conversion, outputs an analog signal corresponding to an input code, and is connected to an output end through the DAC output control logic module; and in the last half of the clock cycle,functions of the first DAC and the second DAC are interchanged. Transient states of DAC switch conversion are enabled to be nonlinearly randomized through DRRZ correction, a spurious free dynamic range (SFDR) of the current-steering-type DAC at high frequency is improved, and matching errors between current sources are mitigated.

Description

technical field [0001] The invention belongs to the field of digital-to-analog conversion, and more specifically relates to a double-time interleaved current steering DAC (Digital to analog converter, digital-to-analog converter) with a DDRZ (Digital Random Retum-to-zero) correction function ). Background technique [0002] With the rapid development of radar and communication fields, the system bandwidth is getting larger and larger. In these applications, high-speed digital-to-analog converters have become a key component in the interface between the digital processor and the analog world. In the high-speed current steering DAC, SFDR (Spurious Free Dynamic range, spurious free dynamic range) is the main performance index to measure the frequency domain characteristics of the DAC. The SFDR decreases with the increase of the sampling frequency, because the code-related switching glitches The nonlinear distortion of the DAC makes the dynamic performance of the DAC have a la...

AI Technical Summary

Problems solved by technology

In the high-speed current steering DAC, SFDR (Spurious Free Dynamic range, spurious free dynamic range) is the main performance index to measure the frequency domain characteristics of the DAC. The SFDR decreases with the increase of the sampling frequency, because the code-related switching glitches The nonlinear distortion of DAC makes the dynamic performance of DAC have a large drop at high frequency

Some existing literatures have proposed methods to improve the dynamic performance of the current steering DAC, but the performance improvement at high frequencies of the DAC is small

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