Substrate embedded power device packaging structure and manufacturing method thereof

Abstract

The invention discloses a substrate embedded power device packaging structure comprising: a substrate having a metalized through hole and a first power chip embedding slot; a first power chip disposedin the first power chip embedding slot; a photo-imageable dielectric (PID) covering the upper and lower sides of the substrate, and provided with an upper opening and a lower opening at positions corresponding to the metalized through hole and the electrode of the first power chip; an upper metal layer disposed on the upper surface of the PID and in the upper opening, and in electric interconnection to the first surface electrode of the first power chip and the metalized through hole; a lower metal layer disposed on the lower surface of the PID and in the lower opening, and in electric interconnection to the second surface electrode of the first power chip and the metalized through hole; an upper solder resist layer covering the upper metal layer; a lower solder resist layer covering thelower metal layer; and a metalized bonding pad.

Description

technical field [0001] The invention relates to the technical field of power device packaging, in particular to a substrate-embedded power device packaging structure and a manufacturing method thereof. Background technique [0002] The traditional aluminum wire-bonding package is the most commonly used and most mature packaging technology for power devices. Its package structure is as follows: figure 1 shown. However, there are several technical bottlenecks in aluminum wire-bonded packaging that restrict the performance improvement of power devices. The main problems are: most of the packaging materials used in aluminum wire-bonded packaging of power devices, such as tin-based lead-free solder, plastic packaging materials, etc., cannot withstand a high temperature environment above 200 degrees Celsius for a long time; gold-based solder is expensive; Lead solders are banned; high-melting-point solders require higher process temperatures, which consume energy and lead to hig...

AI Technical Summary

Problems solved by technology

[0006] Aiming at the problems that the parasitic inductance of the existing power device aluminum wire bonding package may cause voltage overshoot, the heat dissipation effect is poor, the metallization of a single bare chip cannot be performed, the process is complicated, and the cost is relatively good, according to the present invention In one aspect, a substrate-embedded power device packaging structure is provided, including:

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