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Substrate potential selection circuit

A technology for selecting circuit and substrate potential, applied in electrical components, electronic switches, pulse technology, etc., can solve problems such as chip power supply burnout

Pending Publication Date: 2019-05-14
SHANGHAI CHANGYUAN WAYON CIRCUIT PROTECTION CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

When the leakage current is too large, it will burn the inside of the chip and even the power supply

Method used

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Embodiment Construction

[0011] in such as figure 2 In the substrate potential selection circuit shown, R1, R2, MP1, MP2, MP3, MP4, MP5, MP6, MN1, MN2, MN3, MN4, MN5, MN6, MN7, and MN8 form a self-biased voltage comparator, Among them, MP1 and MP2 are used as comparator input pair tubes, and MN1-MN8 constitute the active load of the comparator, and multiple NMOSs can be connected in series to reduce the quiescent current of the voltage comparator. The input signals of the voltage comparator are the input terminal signal IN and the output terminal signal OUT. The output signal of the voltage comparator is generated by Schmitt trigger SMT1 and inverter INV1 to control high and low levels, and MP3, MP4 and Schmitt trigger SMT1 are used to generate hysteresis voltage. As selection circuits, MP5 and MP6 receive the high and low levels output by the Schmitt trigger SMT1 and the inverter INV1, and are used to select the highest potential of IN and OUT as the substrate potential of the power transistor PMOS...

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Abstract

The invention discloses a substrate potential selection circuit. The circuit comprises a first resistor, Second resistor, First PMOS transistor, Second PMOS transistor, and a third PMOS transistor, afourth PMOS transistor, a fifth PMOS transistor, a sixth PMOS transistor, a first NMOS transistor, a second NMOS transistor, a third NMOS transistor, a fourth NMOS transistor, a fifth NMOS transistor,a sixth NMOS transistor, a seventh NMOS transistor, an eighth NMOS transistor, a first Schmitt trigger and a first phase inverter. An input end IN voltage signal and an output end OUT voltage signalact on the input ends of the first resistor and the second resistor, high and low levels are generated through voltage comparison of the IN signal and the OUT signal, and a high voltage signal of theIN signal and a high voltage signal of the output end OUT signal are selected as output signals of the selection circuit. According to the scheme, when the circuit connection is improper and the voltage of the output end OUT is higher than the voltage of the input end IN, large current can be prevented from flowing into the IN from the OUT end, so that a chip is protected from being damaged. Compared with a traditional protection scheme, the device has the characteristics of simple structure, low power consumption, good protection performance and the like.

Description

technical field [0001] The invention relates to a substrate potential selection circuit. When the chip is improperly connected or the external circuit is abnormal, causing the output port voltage to be higher than the power port voltage, the selection circuit can ensure that the substrate of the power transistor PMOS is at the highest potential of the chip, preventing The substrate PN junction is forward-conducting and leakage occurs. Background technique [0002] In the design of analog integrated circuit chips (such as LED drivers and load switches), the design of power tubes is involved, and the design of this module is a crucial part of the entire chip system. In practical application, for load switch products, the connection of power tube and sampling tube is as follows: figure 1 , under normal circumstances, the input power supply voltage of the integrated circuit chip is higher than the output port voltage, and there are parasitic diodes between the substrate and the...

Claims

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Application Information

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IPC IPC(8): H03K17/687
Inventor 支知渊姚和平宋苗闫苗苗
Owner SHANGHAI CHANGYUAN WAYON CIRCUIT PROTECTION CO LTD