Test plate of CPLD chip based on FPGA/MCU

Abstract

The invention discloses a test plate of a CPLD chip based on an FPGA / MCU. The test plate of the CPLD chip based on the FPGA / MCU includes a daughter plate, a main plate and a test base, wherein a testbase installing zone is arranged on the daughter plate; the main plate is located below the daughter plate and connected with the daughter plate; an FPGA chip and an MCU chip are arranged on the mainplate, the FPGA chip is connected with the main plate, and the MCU chip is connected with the FPGA chip; the test base is arranged in the test base installing zone; and the CPLD chip to be tested is arranged in the test base and connected with the daughter plate. According to the structure, a full performance test of the CPLD chip in a laboratory is convenient, and the time cost and the economic cost are lowered at the same time.

Description

technical field [0001] The invention belongs to the field of integrated circuits, in particular to a test board for a CPLD chip based on FPGA / MCU. Background technique [0002] CPLD (Complex Programmable Logic Device) complex programmable logic device is a device developed from PAL and GAL devices. It is relatively large in scale and complex in structure, and belongs to the scope of large-scale integrated circuits. It is a digital integrated circuit in which users can construct logic functions according to their own needs. The basic design method is to use the integrated development software platform to generate the corresponding target files by means of schematic diagrams and hardware description languages, and transfer the codes to the target chip through the download cable ("in-system" programming) to realize the designed digital system. . CPLDs are just one class of chips that can be loaded with programs. Chips that can burn programs and encrypt include DSP, MCU, AVR,...

AI Technical Summary

Problems solved by technology

During the test, put the CPLD chip to be tested in a dedicated socket (socket), and the socket is directly welded on the special PCB bottom plate, and all the pins of the chip to be tested are drawn out, connected to the test machine through the connecting wire, and the test machine The tester end sends and receives data, and controls the test; CPLD chips are usually directly soldered to the PCB in the user end laboratory, and the test is dedicated to the board, and the test content is single

[0004] However, after leaving the mass production environment, it is difficult to conduct a full performance test on the CPLD within the company, and the cost of returning to the factory for testing is high and the time period is long, which is not conducive to abnormal analysis

Images