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An orb-slam hardware accelerator

A hardware accelerator and hardware acceleration technology, which is applied in the direction of instruments, processor architecture/configuration, image enhancement, etc., can solve the problems of ORB-SLAM difficult to run in real time with low power consumption, and achieve the effect of reducing power consumption and increasing frame rate

Active Publication Date: 2020-11-27
BEIHANG UNIV
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  • Summary
  • Abstract
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AI Technical Summary

Problems solved by technology

[0004] The invention provides an ORB-SLAM hardware accelerator, which is used to solve the problem that ORB-SLAM is difficult to run in real time with low power consumption

Method used

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  • An orb-slam hardware accelerator
  • An orb-slam hardware accelerator
  • An orb-slam hardware accelerator

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Embodiment Construction

[0034] Aiming at the problem that the existing ORB-SLAM is difficult to run in real time on a low-power platform, the present invention proposes an ORB-SLAM hardware accelerator. The acceleration module accelerates the process with the largest amount of calculation in the ORB-SLAM process through a dedicated hardware acceleration module, which improves the overall performance and power consumption ratio of the system and makes real-time operation possible with low power consumption. Next, the present invention will be further described in detail by combining specific embodiments and accompanying drawings.

[0035] figure 1 It is a schematic structural diagram of an ORB-SLAM hardware accelerator according to an embodiment of the present invention. Such as figure 1 As shown, the accelerator consists of three parts: FPGA hardware acceleration module, processor system and sensor module. The processor system is the host, the sensor module is connected to the processor system thr...

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Abstract

The invention discloses an ORB-SLAM hardware accelerator, which comprises: an FPGA hardware acceleration module and which is used for accelerating feature extraction and feature matching; a sensor module which is used for capturing images; And a processor system which is used as a host for controlling the FPGA hardware acceleration module and the sensor module, and is responsible for operating pose estimation, pose optimization and map updating. The invention utilizes the FPGA hardware acceleration module to accelerate the process with the largest calculation and the most time consuming in theORB-SLAM process, can effectively improve the running speed of the ORB-SLAM and reduce the power consumption, greatly improve the energy consumption ratio, and reduce the difficulty of ORB-SLAM deployment on power-constrained platforms.

Description

technical field [0001] The invention relates to the field of autonomous navigation, in particular to an ORB-SLAM hardware accelerator. Background technique [0002] SLAM (simultaneous positioning and mapping) is one of the most critical technologies in the field of autonomous navigation. It enables the autonomous navigation system to build incremental maps of the surrounding environment based on information captured by sensors in an unknown environment. At the same time determine their own position in the environment. SLAM is widely used in the fields of self-driving cars, autonomous navigation robots, virtual reality and augmented reality, and is a crucial technology. [0003] ORB-SLAM is a visual SLAM based on feature point method of ORB descriptor. It is a very efficient and robust SLAM system that has received extensive research attention. Existing ORB-SLAM systems can only run on traditional computing platforms (CPU, GPU), which leads to their relatively low performa...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06T1/20G06T5/00G06T7/33G06T7/73
Inventor 杨建磊刘润泽赵巍胜
Owner BEIHANG UNIV
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