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A kind of via structure and method thereof

A manufacturing method and seed layer technology, applied in semiconductor/solid-state device components, semiconductor devices, electrical components, etc., can solve problems such as protracted process time, and achieve the effects of easy process, improved quality and reliability

Active Publication Date: 2021-12-14
SHANGHAI IND U TECH RES INST
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

This over-plating makes the process time longer

Method used

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  • A kind of via structure and method thereof
  • A kind of via structure and method thereof
  • A kind of via structure and method thereof

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Embodiment 1

[0036] Embodiment 1 of the present application provides a method for manufacturing a via structure.

[0037] image 3 is a schematic diagram of the manufacturing method of the through-hole structure in this embodiment. Such as image 3 As shown, the manufacturing method includes:

[0038] Step 301: Fill the through hole of the substrate with a first conductor from the side of the first surface of the substrate in a bottom-up electroplating manner, and the through hole penetrates through the first surface of the substrate and is connected to the first surface of the substrate. A second surface opposite to the first surface, the first conductor filling a part of the through hole;

[0039] Step 302, forming a conductive film on the side of the second surface of the substrate, the conductive film is connected to the upper surface of the first conductor located in the through hole and at least partially covers the through hole. the sidewall of the portion filled with the first ...

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Abstract

The present application provides a through-hole structure and a manufacturing method thereof. The method includes: filling the through-hole of the substrate with a first conductor from the side of the first surface of the substrate in a bottom-up electroplating manner, and the through-hole penetrates through the through-hole of the substrate. On the first surface and the second surface opposite to the first surface, the first conductor fills a part of the through hole; on the second surface side of the substrate, a conductive film is formed, and the conductive film and the first conductor are positioned in the through hole. The upper surface is connected to and at least partially covers the side wall of the through hole not filled with the first conductor; the second conductor is filled into the through hole with the above-mentioned conductive film as a starting point in a conformal plating manner until the through hole is filled with the first conductor. body and the second conductor are filled. According to the present application, it is possible to reduce voids in the conductor of the through-hole structure, depressions on the surface of the conductor, and gaps between the conductor and the sidewall of the through-hole, improve the quality and reliability of the through-hole, and facilitate subsequent processes.

Description

technical field [0001] The present application relates to the technical field of semiconductors, in particular to a via structure and a method thereof. Background technique [0002] In recent years, the demand for miniaturization, high-speed and multi-functionalization of electronic devices, semiconductor devices, and optical devices has become increasingly strong, and it is often necessary to stack two or more chips in the thickness direction. At this time, it is necessary to realize the electrical interconnection between chips by forming vertical conduction of circuits between chips and even between wafers. Through-Silicon Via (TSV: Through-Silicon Via) technology is a key technology for electrical interconnection between chips. The formation of the TSV includes the manufacture of the through hole, the filling of the conductor in the through hole, and the planarization of the surface of the conductor. Conductor filling in vias often uses electroplating techniques. The t...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/768H01L21/288H01L23/528
CPCH01L21/76882H01L23/5283H01L21/2885
Inventor 王诗男
Owner SHANGHAI IND U TECH RES INST