Sigma-Delta modulator without access to clock signal

Abstract

The invention relates to a sigma-delta modulator without access to a clock signal, belonging the field of analog circuits. The modulator comprises an inverting adder, an integrator and a quantizer without access to the clock signal. The inverting adder, the integrator and the quantizer are connected to form a forward channel. A digital-to-analog converter (DAC) is connected to the quantizer and the inverting adder to form a feedback channel. The modulator outputs a pulse signal and then the signal is sent to a microprocessor, wherein the signal is a low-bit data stream. After homogenization treatment, decimation filter is carried out to acquire a high-bit data stream. A high-frequency clock of the microprocessor is adopted to increase sampling rate of sigma-delta ADC. Accordingly, enhancement of the sampling rate is no long confined to limit of an artificial circuit. With digits of the quantizer same as orders of the modulator, a higher signal-to-noise ratio is acquired.

Description

technical field [0001] The invention belongs to the field of analog-digital circuits, and in particular relates to a Σ-Δ modulator not connected to a clock signal. Background technique [0002] Signals in the analog field and the digital field need to be connected through an analog-to-digital converter (Analog to Digital Converter, ADC) as a medium. The Σ-Δ ADC is an oversampling ADC, which has the advantages of high resolution, strong quantization noise suppression ability, small hardware scale, and easy integration with digital systems. The quantization accuracy can be improved by increasing the oversampling rate. [0003] The signal-to-noise ratio of a Σ-Δ ADC is primarily determined by the Σ-Δ modulator and is proportional to the number of quantizer bits, modulator order, and oversampling ratio. However, the linearity of the multi-bit quantizer is not good, and it will increase the complexity of the circuit structure. Generally, the design of a 1-bit quantizer is used (...

AI Technical Summary

Problems solved by technology

[0005] The present invention aims at the problem that the improvement of the oversampling rate in the Σ-Δ ADC in the prior art is limited by the analog circuit, and proposes a Σ-Δ modulator that does not access the clock signal, and uses a microprocessor to output pulses from the modulator When the signal is used for data capture, if a high-frequency clock that exceeds the capacity of the modulator circuit is used, a higher ADC oversampling rate can be achieved under the same condition of the number of digits of the quantizer and the order of the modulator, thereby improving the signal-to-noise ratio

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