A Charge Compensation Circuit and Memory Structure for Reducing Read Operation Voltage Jitter

Abstract

The invention discloses a charge compensation circuit for reducing read operation voltage jitter and a memory structure. A row decoder and a column decoder of an original memory structure are respectively connected with a charge compensation circuit, wherein the front end of the compensation output drive is connected with a WL _ EN / BL _ EN signal, the rear end of the compensation capacitor is connected with a compensation output drive, the rear end of the compensation capacitor is connected with a reading voltage VPP, the compensation output drive outputs compensation voltage, the compensationcapacitor is charged, and then the reading voltage VPP is compensated; and the chip power supply VDD provides high voltage for the compensation output drive. According to the invention, the problem that the VPP voltage drop caused by the load capacitor affects the reading operation accuracy is solved; compared with the prior art, the VPP chip has the advantages that the increase of C0 accommodation or the addition of on-chip capacitors is avoided, the chip cost is reduced, and on the contrary, the load capacitance of the VPP is reduced and the voltage recovery is faster by reducing the C0 capacitance value; and meanwhile, the requirement on the output capability of the charge pump is also reduced.

Description

technical field [0001] The invention relates to the technical field of memory, in particular to a charge compensation circuit and a memory structure for reducing read operation voltage jitter. Background technique [0002] Memory is one of the indispensable components in modern electronic products. The internal storage units are usually arranged in a large array. According to the address, the corresponding storage unit is selected by the decoder to complete the internal data read and write operations of the storage unit. , and the stability of the voltage when reading and writing data has a great impact on performance. figure 1 It is a FLASH memory structure among many memories, which includes the following core physical parts: memory cell array, row decoder, column decoder, bit selection switch, sense amplifier, power supply module and control module. [0003] The storage unit is a floating gate field effect transistor. The gates of all storage units in each row are connec...

AI Technical Summary

Problems solved by technology

Due to the speed requirements of the read command, the time from WL_EN to SENSE is generally very short, and it is difficult for the VPP voltage to fully recover

When WL_EN is switched, the voltage drop on VPP can be approximated as C1 / (C1+C0). If C0 is large enough, the voltage drop is very small, which can meet the needs; in fact, for small-capacity memories, C0 is usually small. If you want To meet the requirements of fast recovery of VPP, one method is to add a large number of on-chip capacitors to VPP, which leads to an increase in cost. Another method is to increase the response speed and drive capability of the charge pump, but also increase the area. and will cause the ripple of VPP to increase

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