Three-level inverter narrow pulse suppression method and device

A three-level inverter and suppression device technology, applied in the output power conversion device, electrical components, AC power input into DC power output and other directions, can solve the damage of the bomber, harmonic increase, IGBT loss, etc. problems, to achieve the effect of eliminating narrow pulses, reducing volume and saving costs

Pending Publication Date: 2019-10-11
TBEA XIAN ELECTRIC TECH +1
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  • Abstract
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Problems solved by technology

[0003] In order to solve the problems existing in the prior art, the object of the present invention is to provide a narrow pulse suppression method and

Method used

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  • Three-level inverter narrow pulse suppression method and device
  • Three-level inverter narrow pulse suppression method and device
  • Three-level inverter narrow pulse suppression method and device

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[0019] The technical solution of the present invention will be described in detail below in conjunction with the drawings.

[0020] figure 1 It is a three-level co-directional carrier modulation SPWM driving principle diagram; the mechanism of the narrow pulse generated near the zero crossing point of the modulation wave is as follows figure 2 As shown; the narrow pulse generated at the peak of the modulating wave is as image 3 Shown.

[0021] In order to achieve the above-mentioned purpose of the invention, the present invention provides the following technical solutions:

[0022] Reference Figure 4 In this embodiment, a narrow pulse suppression method for a three-level inverter includes the following steps:

[0023] Step 1. Determine the duty cycle corresponding to the minimum pulse width, and determine the duty cycle corresponding to the minimum pulse width based on the minimum turn-on, turn-off time and dead time of the IGBT. The minimum IGBT turn-on and turn-off short time and...

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Abstract

The invention discloses a three-level inverter narrow pulse suppression method and device; the method comprises the following steps of S1, determining the minimum pulse width by combining factors suchas minimum turn-on time and turn-off time, dead zone time, switching frequency and the like of an IGBT, and calculating the duty ratio; S2, calculating the amplitude of a voltage vector, carrying outper-unit treatment, and comparing the amplitude with an upper limit value, and then carrying out correction and amplitude limiting on the vector amplitude when the amplitude is greater than the upperlimit; S3, calculating the duty ratio of the three-phase modulating waves; S4, making compassion between the duty ratio of the three-phase modulating waves and the duty ratio corresponding to the minimum pulse width, wherein if the absolute value of the duty ratio of any one phase of modulating wave is smaller than the duty ratio corresponding to the minimum pulse width, the duty ratio of the modulating wave of the phase is assigned to an intermediate variable temp, and the temp is subtracted from the duty ratio of the three-phase modulating waves; and S5, updating a PWM register. According to the method, an additional hardware circuit does not need to be added, and the method is easy to implement; and compared with a method for restraining a narrow pulse by using a hardware circuit and the like, the size can be effectively reduced, and the cost is saved.

Description

technical field [0001] The invention belongs to the technical field of pulse width modulation and relates to a narrow pulse suppression and compensation method, in particular to a narrow pulse suppression method and device for a three-level inverter. Background technique [0002] With the development of the photovoltaic industry and the maturity of inverter technology, the requirements for power quality and system efficiency are also getting higher and higher. Compared with traditional two-level inverters, three-level inverters have smaller harmonics. , high efficiency, high withstand voltage, etc., and have achieved good application results. With the development of technology and the improvement of digital processor performance, the switching frequency of inverters is getting higher and higher, and the impact of narrow pulses is more obvious. Under narrow pulse conditions , the IGBT current change rate dic / dt will increase. Due to the stray inductance in the line, a higher ...

Claims

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Application Information

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IPC IPC(8): H02M1/088H02M1/38H02M7/483
CPCH02M1/088H02M1/38H02M7/483H02M1/385
Inventor 周洪伟刘永奎柯杨斌刘文涛黄峰
Owner TBEA XIAN ELECTRIC TECH
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