Semi-floating gate transistor of epitaxial TFET channel and preparation method thereof

A technology of a semi-floating gate transistor and a manufacturing method, which are applied in the fields of transistors, semiconductor/solid-state device manufacturing, semiconductor devices, etc., can solve the problems of limiting the storage speed of semi-floating gate memory, restricting the speed of charge storage, etc. The effect of wear probability

Active Publication Date: 2019-11-05
FUDAN UNIV +1
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Problems solved by technology

[0003] The tunneling of the planar semi-floating gate transistors generally studied at present mainly occurs at the position where the channel of the embedded TFET contacts the drai

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  • Semi-floating gate transistor of epitaxial TFET channel and preparation method thereof
  • Semi-floating gate transistor of epitaxial TFET channel and preparation method thereof
  • Semi-floating gate transistor of epitaxial TFET channel and preparation method thereof

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[0045] In order to make the purpose, technical solutions and advantages of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. It should be understood that the specific The examples are only used to explain the present invention, not to limit the present invention. The described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0046] In the description of the present invention, it should be noted that the orientation or positional relationship indicated by the terms "upper", "lower", "vertical" and "horizontal" are based on the orientation or positional relation...

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Abstract

The invention belongs to the technical field of semiconductors, and particularly relates to a semi-floating gate transistor of an epitaxial TFET channel and a preparation method of the semi-floating gate transistor. The semi-floating gate transistor provided by the invention comprises a substrate having a heavily-doped region of a first doping type and a heavily-doped region of a second doping type; a first gate oxide layer which partially covers the heavily-doped regions; a lightly-doped silicon layer which is arranged on the surfaces of the heavily-doped regions and extends to cover a part of the first gate oxide layer; a first polycrystalline silicon layer which is of a first doping type, is arranged on the first gate oxide layer and covers a part of the lightly-doped silicon layer; a second gate oxide layer which is arranged on the first polycrystalline silicon layer and the lightly-doped silicon layer; a second polycrystalline silicon layer which is of a second doping type and isarranged on the second gate oxide layer; a gate sidewall; a source region and a drain region which are arranged in the substrate and on two sides of the grid side wall. According to the invention, theslope of the electric fields of the channel and the drain terminal along with the position change is increased, so that the tunneling of the TFET is changed from point tunneling to surface tunneling,the tunneling probability of the semi-floating gate transistor is greatly improved, and the speed of the device is improved.

Description

technical field [0001] The invention belongs to the technical field of semiconductors, and in particular relates to a semi-floating gate transistor of an epitaxial TFET channel and a preparation method thereof. Background technique [0002] With the continuous development of semiconductor memory, in order to overcome the capacitance limit of traditional DRAM, new semiconductor memory structures are constantly being proposed, and semi-floating gate memory is a new type of memory structure with potential application value. Since the storage speed of a memory is an important index to measure the performance of a memory, how to increase the speed of the half-floating gate transistor has become an important research direction of the half-floating gate transistor at present. [0003] The tunneling of the planar semi-floating gate transistors generally studied at present mainly occurs at the position where the channel of the embedded TFET contacts the drain, which is a point tunnel...

Claims

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Application Information

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IPC IPC(8): H01L29/10H01L29/16H01L29/36H01L21/336H01L27/108
CPCH01L29/16H01L29/36H01L29/1033H01L29/66825H10B12/20H10B12/01
Inventor 张卫王晨田梓良何振宇顾正豪李涵甘露荣陈琳孙清清
Owner FUDAN UNIV
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