Vertically stacked gate-all-around silicon nanowire tunneling field-field transistor and preparation method thereof

Abstract

The invention provides a vertically stacked gate-all-around silicon nanowire tunneling field-field transistor and a preparation method thereof. The preparation method comprises: a nanowire array and agate stacking structure surrounding the nanowire array are formed, wherein a first notch and a second notch that correspond to each other are formed at the two ends of the gate stacking structure; ahigh-k medium side wall and a low-k medium side wall are formed in the first notch and the second notch respectively; and a heavily-doped layer is formed between the high-k medium side wall and a channel layer. Because the heavily-doped layer having the type opposite to the doping type of a source region is inserted between the source region and the channel layer, the tunneling probability is increased; on the basis of the gate-all-around structure, the gate control capability is enhanced; the local electrical field is increased by introducing the high-k medium side wall into one side of the source region; with the gate-all-around nanowires stacked in a vertical direction, the effective tunneling area is extended and thus the opening current of the tunneling field-field transistor is improved obviously; and because of the low-k medium side wall at one side of the drain region, the bidirectional conduction characteristics of the tunneling field effect transistor are suppressed effectively.

Description

technical field [0001] The invention relates to the technical field of semiconductors, and in particular, to a vertically stacked ring gate nanowire tunneling field effect transistor and a preparation method thereof. Background technique [0002] With the improvement of the integration density of CMOS devices, the increasing power consumption will become an important bottleneck restricting the further development of integrated circuits. Reducing the operating voltage by reducing the sub-threshold swing of the device is an effective solution to reduce power consumption, and tunneling field effect transistors are one of the effective technical routes to achieve this solution. However, the tunneling field effect transistor has a low turn-on current, which makes it easy to conduct bidirectional conduction. [0003] Improving the turn-on current and suppressing the bidirectional conduction characteristics of the tunneling field effect transistor by optimizing the device structur...

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Problems solved by technology

[0004] The main purpose of the present invention is to provide a vertically stacked gate-all-around nanowire tunneling field effect transistor and its preparation method to solve the problems in the prior art that it is difficult to improve the turn-on current of the tunneling field effect transistor and suppress its bidirectional conduction characteristics question

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