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Low-cost high-reliability power semiconductor device and preparation method thereof

A power semiconductor and reliability technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problem of high manufacturing cost of MOSFET devices or IGBT devices

Active Publication Date: 2019-11-12
江苏芯长征微电子集团股份有限公司 +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0018] In summary, for MOSFET devices or IGBT devices, at least six reticles need to be provided during the front-side process to use the corresponding reticles for the corresponding photolithography process steps, so that the prepared MOSFET device or IGBT device higher cost

Method used

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  • Low-cost high-reliability power semiconductor device and preparation method thereof
  • Low-cost high-reliability power semiconductor device and preparation method thereof
  • Low-cost high-reliability power semiconductor device and preparation method thereof

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Embodiment Construction

[0079] The present invention will be further described below in conjunction with specific drawings and embodiments.

[0080] Such as Figure 21 As shown: in order to improve the breakdown voltage of the terminal region and improve the UIS capability of the power semiconductor device, taking the N-type power semiconductor device as an example, the present invention includes a semiconductor substrate 38 with an N conductivity type, and the semiconductor substrate 38 An active area is set in the central area of ​​the active area, and a terminal protection area is set on the outer circle of the active area, and the cells in the active area adopt a trench structure;

[0081] On the cross-section of the power semiconductor device, the active region includes a substrate cell trench 35 and a cell edge trench 36, and the cell edge trench 36 is adjacent to the active region and terminal protection in the semiconductor substrate. In the joint part of the region, the width of the cell ed...

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Abstract

The invention relates to a low-cost high-reliability power semiconductor device and a preparation method thereof. A cell in an active region adopts a trench structure; the active region internally includes a substrate cell trench and a cell edge trench; the width of the cell edge trench is greater than the width of the substrate cell trench; a cell edge trench second conductivity type doped regionis provided directly below the cell edge trench bottom; substrate second conductivity type body regions are arranged at two sides of the cell edge trench; the cell edge trench is filled with edge trench conductive polysilicon and a substrate insulating dielectric layer; a substrate source metal layer is supported on the substrate insulating dielectric layer; and the substrate source metal layer is in ohmic contact with the substrate second conductivity type base region, the substrate first conductivity type source region and the substrate second conductivity type body regions at two sides ofthe cell edge trench. The breakdown voltage of the terminal region can be improved, the manufacturing cost is reduced, the UIS capability of the power semiconductor device is improved, and the methodis compatible with the existing process and is safe and reliable.

Description

technical field [0001] The invention relates to a power semiconductor device and a preparation method thereof, in particular to a low-cost and high-reliability power semiconductor device and a preparation method thereof, belonging to the technical field of power semiconductor devices. Background technique [0002] At present, power semiconductor devices are developing rapidly. On the one hand, the technology of IGBT and VDMOS is constantly innovating to achieve excellent performance; on the other hand, low cost has also become the pursuit goal of power semiconductor development. Among the processing costs of power semiconductors, the cost of masks and the corresponding photolithography process are often the main ones, so reducing the number of masks becomes the key to reducing device costs. In most cases, there is often a compromise relationship between high-performance devices and low cost, unless new devices, process methods, and so on appear. [0003] Such as Figure 1 t...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/06H01L29/739H01L29/78H01L21/331H01L21/336
CPCH01L29/7393H01L29/78H01L29/0607H01L29/0696H01L29/66325H01L29/66477
Inventor 杨飞白玉明吴凯朱阳军
Owner 江苏芯长征微电子集团股份有限公司