Phase-locked loop circuit

Abstract

The embodiment of the invention discloses a phase-locked loop circuit. The phase-locked loop circui comprises a phase frequency detector, a charge pump, a filter circuit, a voltage-current conversioncircuit, a first capacitor, a voltage buffer unit, a second capacitor, a current mirror image unit, a current control oscillator and a frequency divider. The phase frequency detector, the charge pump,the voltage-current conversion circuit, the current control oscillator and the frequency divider are connected in sequence; the filter circuit is connected between the first node and the grounding end; the first capacitor is connected between the second node and the grounding end; the input end of the voltage buffer unit is connected with the second node, and the input end of the voltage buffer unit is connected with one end of the second capacitor; the other end of the second capacitor is connected with the input end of the current mirror image unit, and the output end of the current mirrorimage unit output unit is connected with the second node. Voltage fluctuation caused by the oscillator can be reduced, and therefore jitter of an output clock of the phase-locked loop circuit is reduced.

Description

technical field [0001] The embodiments of the present invention relate to the technical field of circuits, and in particular to a phase-locked loop circuit. Background technique [0002] With the development of wireless communication technology and integrated circuit technology, more and more wireless communication systems are integrated on the chip. Phase-locked loops can generate precise clock signals or frequency signals, so they are widely used in clock generators. In electronic systems such as wireless communication transceiver systems and clock / data recovery circuits, frequency synthesizers based on phase-locked loops are widely used in radio frequency In the sending and receiving system. These requirements have promoted the research and development of phase-locked loop circuits. [0003] In the prior art, the oscillator in the phase-locked loop will cause voltage fluctuations, making the clock jitter output by the phase-locked loop circuit larger, so it is particula...

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Problems solved by technology

[0003] In the prior art, the oscillator in the phase-locked loop will cause voltage fluctuations, making the clock jitter output by the phase-locked loop circuit larger, so it is particularly important to reduce the output jitter of the phase-locked loop

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