Field circuit coupling method and device for direct-current electric field of multi-layer integrated circuit

An integrated circuit and DC electric field technology, which is applied in electrical digital data processing, special data processing applications, instruments, etc., can solve scanning result errors, missing super nodes, and affect the accuracy of the field-circuit coupling method of multilayer integrated circuit DC electric field and integrity issues

Active Publication Date: 2020-01-14
北京智芯仿真科技有限公司
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Problems solved by technology

[0004] However, in the process of implementing the present invention, the inventors found that in the prior art for the analysis of the electric field-circuit coupling (referred to as field-circuit coupling) of the DC electric field of the multilayer integrated circuit, when the equations are combined by scanning supernodes, it i

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  • Field circuit coupling method and device for direct-current electric field of multi-layer integrated circuit
  • Field circuit coupling method and device for direct-current electric field of multi-layer integrated circuit
  • Field circuit coupling method and device for direct-current electric field of multi-layer integrated circuit

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Embodiment approach

[0141] As a possible implementation manner, the first processing unit may include:

[0142] The first processing subunit: used to define all the external circuit nodes before forming the super node as original nodes, and set the original numbers for the original nodes, and set all the external circuit nodes as the super nodes, The original node of the super node is set to itself;

[0143] The second processing subunit: used to search for all the voltage source branches included in the external circuit, merge the two supernodes at the terminals of the voltage source branches into one supernode, and merge the two supernodes From the original node to the merged supernode, delete the unmerged supernode to form an updated external circuit;

[0144] The third processing subunit: used to judge whether the updated external circuit includes the voltage source branch, if so, transfer to the second processing subunit to continue processing, if not, select one for all the supernodes The...

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Abstract

The embodiment of the invention discloses a field circuit coupling method and device for a direct-current electric field of a multi-layer integrated circuit. The method comprises: acquiring a multilayer integrated circuit direct-current electric field two-dimensional model simplified according to a three-dimensional model of a multilayer integrated circuit direct-current electric field, establishing a field domain solving equation set for the two-dimensional model of each layer through a finite element method, and forming an overall sparse matrix of the integrated circuit field domain solvingequation set; for an external circuit of the integrated circuit, establishing a symmetric positive definite external circuit equation set according to a super-node method; and combining the field domain solving equation set with the external circuit equation set, establishing a symmetrical positive definite unified solving equation set of field-circuit coupling, combining the equation sets by scanning the super nodes, and ending scanning if all the super nodes are scanned. Field circuit coupling can be accurately and completely carried out on the multi-layer integrated circuit direct-current electric field, and the design effect of multi-layer integrated circuit and chip packaging is improved.

Description

technical field [0001] The invention relates to the field of field-circuit coupling of a DC electric field of a multilayer integrated circuit, in particular to a field-circuit coupling method and device of a DC electric field of a multilayer integrated circuit. Background technique [0002] Due to the increase in packaging density of integrated circuits in the prior art, resulting in a high concentration of interconnection lines, this necessitates the use of multiple substrates. In the layout of the printed circuit, unforeseen design problems such as noise, stray capacitance, crosstalk, etc. have appeared. Therefore, integrated circuit printed circuit board design must focus on minimizing the length of signal lines and avoiding parallel routes. Obviously, in a single-panel, or even a double-panel, these demands cannot be satisfactorily answered due to the limited number of crossovers that can be achieved. In the case of a large number of interconnection and crossover requi...

Claims

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Application Information

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IPC IPC(8): G06F30/23G06F30/398G06F30/3308
Inventor 唐章宏
Owner 北京智芯仿真科技有限公司
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