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Semiconductor device and manufacturing method thereof

A manufacturing method and semiconductor technology, applied in the direction of semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., to achieve the effects of improving gate control capability and output current characteristics, reducing resistance, and increasing effective width

Active Publication Date: 2020-01-24
SEMICON MFG INT TIANJIN +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the performance of current gate-enclosed semiconductor devices still needs to be further improved.

Method used

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  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof

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Experimental program
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Embodiment Construction

[0054] As mentioned in the background technology, the channel of the surrounding gate semiconductor device is surrounded by its gate and is only controlled by the gate, but the channel is basically equal in thickness in the direction of the channel length, and the source and drain regions (S / D) The relative channel (Channel) is a narrow extension (the source and drain regions are as thick as the channel, that is, Straight extension), or a wide extension (the source and drain regions are wider and thicker than the channel, that is, wide extension), When extending wide, the source-drain region is connected to the channel through a sharp "L"-shaped corner (that is, the part composed of the end of the channel and the sidewall of the source-drain region). The resistance of the source-drain region under these two structures is relatively large, which affects the device performance.

[0055]Based on this, in the technical solution of the present invention, the end of the formed chan...

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PUM

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Abstract

The invention provides a semiconductor device and a manufacturing method thereof. According to the manufacturing method, back etching is performed on fins on two sides of a virtual gate structure; sacrificial layers are shorter than channel layers, so that grooves can be formed between two adjacent channel layers; spacer side walls covering the sacrificial layers are formed in the grooves; after source-drain epitaxial layers are epitaxially grown on two sides of the virtual gate structure, the virtual gate structure and the sacrificial layers are removed, so that the channel layers can be exposed; protective side walls covering the side walls of the channel layers are formed; the protective side walls are adopted to protect the side walls of the channel layers, so that process space can beprovided, and therefore, the channel layers and the spacer side walls are trimmed; the channel layers and the spacer side walls can be trimmed multiple times, so that nanowire channel structures gradually thickened towards the source-drain epitaxial layers can be formed; and therefore, the effective width and effective area of channels can be increased, the resistance of source-drain regions canbe effectively reduced, and the grid control capability and output current characteristic of the device can be improved.

Description

technical field [0001] The invention relates to the technical field of integrated circuit manufacturing, in particular to a semiconductor device and a manufacturing method thereof. Background technique [0002] With the continuous development of the integrated circuit industry, the critical dimensions of integrated chips are also shrinking in accordance with Moore's law, and the requirements for the device structure of integrated chips are also getting higher and higher. In advanced integrated chips, traditional planar devices have been difficult to meet the requirements of circuit design. Therefore, devices with non-planar structures also emerge as the times require. For example, semiconductor devices with a Gate-all-around (GAA) structure are one of them. The channel of the device is surrounded by the gate of the device, and is only surrounded by the gate. Control can effectively limit the short channel effect (Short channel effect), which is conducive to continuously red...

Claims

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Application Information

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IPC IPC(8): H01L21/335H01L21/336H01L29/775H01L29/78H01L29/06B82Y10/00
CPCH01L29/66439H01L29/66545H01L29/66795H01L29/775H01L29/785H01L29/0673B82Y10/00
Inventor 张海洋纪世良钟伯琛
Owner SEMICON MFG INT TIANJIN