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Configurable convolution accelerator applied to convolutional neural network

A convolutional neural network and accelerator technology, applied in the field of configurable convolution accelerators, can solve the problems of high power consumption of CNN hardware accelerators, low data utilization, storage and access data, etc. The effect of reducing off-chip memory accesses

Pending Publication Date: 2020-02-04
HUAZHONG UNIV OF SCI & TECH
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Problems solved by technology

[0006] Aiming at the defects of the prior art, the purpose of the present invention is to provide a configurable convolution accelerator applied to the convolutional neural network, aiming at solving the problem of the low data utilization rate in the existing convolution operation which leads to the frequent failure of the convolution acceleration operation unit. External storage accesses data, and then the problem of high power consumption of CNN hardware accelerator

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  • Configurable convolution accelerator applied to convolutional neural network
  • Configurable convolution accelerator applied to convolutional neural network
  • Configurable convolution accelerator applied to convolutional neural network

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[0033] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0034] Such as figure 1 As shown, the present invention provides a configurable convolution accelerator applied to convolutional neural networks, including: a transmission clock domain module and a main clock domain module, the transmission clock domain module is used for data exchange with off-chip memory; The domain module and the main clock domain module are independent of each other, and the two exchange data through an asynchronous first-in-first-out buffer; the main clock domain module is used to perform convolution operations on the input feature map and convolution kernel weights in a confi...

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Abstract

The invention discloses a configurable convolution accelerator applied to a convolutional neural network, which comprises a transmission clock domain module and a main clock domain module, and is characterized in that the main clock domain module comprises a computing unit array, a global cache and an on-chip network; the global cache is used for storing the a first intermediate result, the a second intermediate result, the an input feature map and the convolution kernel weight, and transmitting the output feature map; the on-chip network is used for controlling multiplexing of the structure of the computing unit array, the convolution kernel and the input feature map, and controlling the position and direction of data transmission; and the calculation module is used for performing convolution calculation on the acquired input feature map, the convolution kernel weight and the first intermediate result to acquire a second intermediate result and an output feature map. According to theconfigurable accelerator, the structure of the computing unit array is controlled through the network-on-chip, multiplexing of the computing unit on the input feature map and the convolution kernel and accumulation of the second intermediate result are achieved, off-chip storage access of the input feature map and convolution kernel data is remarkably reduced, and then power consumption of the configurable accelerator is reduced.

Description

technical field [0001] The invention belongs to the hardware field of convolution layer operation acceleration, and more specifically relates to a configurable convolution accelerator applied to a convolution neural network. Background technique [0002] Convolutional Neural Networks (CNN) are currently widely used in image recognition, including autonomous driving, drone navigation, and robot vision. Although CNN can provide the highest accuracy in many image recognition tasks, it will greatly increase the computational complexity. Therefore, techniques that can effectively improve the energy efficiency and throughput of processing CNNs without reducing application accuracy or increasing hardware costs are crucial for the widespread deployment of CNNs in artificial intelligence (AI) systems. [0003] In convolutional neural network computing tasks, there are a large number of convolution operations that can be performed in parallel. If a traditional general-purpose process...

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Application Information

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IPC IPC(8): G06N3/063G06N3/04
CPCG06N3/063G06N3/045
Inventor 雷鑑铭徐明毛奕陶
Owner HUAZHONG UNIV OF SCI & TECH