LDMOS device and manufacturing method thereof

Abstract

The invention discloses an LDMOS device and a manufacturing method thereof. The manufacturing method comprises the steps of: providing a semiconductor substrate, and forming a P-type trap region and adrift region in the semiconductor substrate, forming a source electrode in the P-type trap region, wherein the source electrode comprises P-type region contact and N-type region contact, forming a drain electrode and an isolation structure in the drift region, wherein the width of the isolation structure is smaller than a first threshold value, forming a gate electrode above the P-type trap region and the drift region, forming an alloy barrier region on one side, close to the drift region, in the gate electrode and above the drift region, forming a contact hole field plate above the alloy barrier region, and forming a metal field plate above the contact hole field plate. By means of the manufacturing method, on the premise that any photoetching level is not increased, the large-size contact holes are additionally formed in the structure of a traditional LDMOS device to serve as a field plate to maintain breakdown voltage, and meanwhile the size of the isolation structure is reduced toobtain the lowest on-resistance.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to an LDMOS device and a manufacturing method thereof. Background technique [0002] Field plates are widely used in the production of low, medium and high voltage LDMOS (Laterally Diffused Metal Oxide Semiconductor), structurally divided into traditional Metal (metal) field plates, Poly (polysilicon) field plates and new Contact (contact hole) field plates; In terms of function, it is divided into using the coupling effect of the field plate to increase BV (Breakdown Voltage, breakdown voltage), suppressing HCI (Hot Carriers Injection, hot carrier injection) effect, and reducing Rdson (on-resistance). Due to the influence of the high thickness of ILD (isolation layer) (>10KA) and STI (shallow trench isolation) thickness (>4KA), Metal field plates and Poly field plates are mainly used in ultra-high voltage LDMOS, while Contact field plates are mainly used for ultra-high voltage L...

AI Technical Summary

Problems solved by technology

[0003] like figure 1 As shown, in traditional LDMOS devices, STI is used as a buffer to increase the BV of the device. The thickness of ILD and STI is greater than 15KA, so that the metal field plate cannot act on the surface of the N-drift region. BV is usually greater than 30V, but the on-resistance is relatively high

At present, there is also a new type of contact hole field plate, such as figure 2 As shown, it breaks through the limitation of ILD thickness and realizes the continuation of the metal field plate, but without the buffering effect of STI, the BV drops seriously, and is mainly used in low-voltage devices

Images