Dynamic random access memory, memory management method and system and storage medium

Abstract

The invention provides a dynamic random access memory, a memory management method, a memory management system and a storage medium. The dynamic random access memory comprises a circuit substrate, anda DRAM chipset, a memory controller, a first interface and a second interface which are integrated on the circuit substrate, the memory controller is respectively connected with the DRAM chipset and afirst interface and responds to a read-write request of the central processing unit connected to the first interface; the memory controller is connected with the second interface; and when the instruction set read by the central processing unit in the DRAM chipset meets a preset condition, acquiring a subsequent instruction set of the instruction set in the DRAM chipset from a large-capacity storage device through the second interface, and storing the subsequent instruction set in the DRAM chipset. The method can enable the central processing unit to be always in an efficient operation state,is suitable for the fields of cloud calculation and the like, and can greatly improve the operation efficiency of the system.

Description

technical field [0001] The present invention relates to the computer field, and more specifically, relates to a dynamic random access memory, a memory management method, a system and a storage medium. Background technique [0002] At present, DRAM (Dynamic Random Access Memory, dynamic random access memory) technology has achieved great development, and the main applications are synchronous dynamic random access memory (SDRAM), double data rate (DDR) SDRAM, and the second generation of double data rate (DDR2) SDRAM, 3rd generation double data rate (DDR3) SDRAM and 4th generation double data rate (DDR4) SDRAM and many other types. For the above-mentioned types of DRAM, the memory controller and the DRAM chip (i.e. memory particles) are generally used, and the CPU (central processing unit) sends control commands to the DRAM chip via the memory controller, including clock signals, command control signals, and addresses. Signals, etc., and control the read and write operations ...

AI Technical Summary

Problems solved by technology

[0005] The technical problem to be solved by the present invention is to provide a dynamic random access memory, a memory management method, a system, and a storage medium for the problem that the interaction speed between the central processing unit and the large-capacity storage device affects the operating efficiency in the above-mentioned computer system

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