A small-volume three-dimensional antifuse FPGA online debugging and verification method

Abstract

A small-volume three-dimensional anti-fuse FPGA online debugging and verification method, fully considering the miniaturization design requirements, after the test program is finalized, the SRAM-based FPGA design is transplanted to a more reliable anti-fuse FPGA, reducing the number of transfer stages To change the impact of the design on the product, the anti-fuse FPGA QFP208 package is nested inside the motherboard surface mount package. After debugging with the SRAM-type FPGA on the sub-board, unsolder the verification circuit, and then solder the anti-fuse FPGA chip on the internal nested package. The invention solves the problem of hardware design incompatibility when the tested FPGA design is transplanted to a more reliable anti-fuse FPGA, effectively reduces the volume of the verification circuit, and greatly reduces the influence of the debugging FPGA on the motherboard circuit layout and wiring . The invention can meet the requirements of the miniaturization design of aerospace products, and improves the integration degree of motherboard circuit design.

Description

technical field [0001] The invention relates to a small-volume three-dimensional antifuse FPGA online debugging verification method, which belongs to the technical field of integrated circuits. Background technique [0002] FPGA (Field Programmable Gate Array Field Programmable Gate Array)) is a high-density programmable logic device, which is a new type of programmable logic device developed and widely used in recent years. It usually includes three types of programmable resources: Programmable logic function block CLB. Programmable I / 0 module lOB and programmable internal interconnection PI. These three parts are programmable in themselves, but also in relation to each other. [0003] Due to the particularity of the space environment, single event upsets (SEUs) occur frequently in orbiting satellite products, and non-volatile FPGA devices based on antifuse have more advantages than ASIC and SRAM products, so designers must consider the use of SRAM-based FPGA designs are...

AI Technical Summary

Problems solved by technology

[0007] The technical solution problem of the present invention is: overcome the deficiencies in the prior art, propose a kind of small-volume three-dimensional anti-fuse FPGA online debugging verification method, solve the problem that the FPGA design based on SRAM is transplanted to a more reliable anti-fuse FPGA When the hardware design is not compatible

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