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Method for improving OTP performance

A technology of performance and energy injection, applied in electrical components, semiconductor/solid-state device manufacturing, circuits, etc., and can solve problems such as weak programming

Inactive Publication Date: 2020-05-12
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0009] The technical problem to be solved by the present invention is to provide a method for improving OTP performance, improve the anti-interference ability and solve the problem of weak programming at the same time

Method used

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  • Method for improving OTP performance
  • Method for improving OTP performance

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Embodiment Construction

[0026] The method for improving OTP performance described in the present invention is to solve the two problems of interference and weak programming of OTP products of dual PMOS, specifically in forming P-type lightly doped drain regions (PLDD) or heavily doped P-type drain regions of PMOS. In the region, reduce the implantation energy and implantation dose of the oblique implantation.

[0027] The invention reduces the injection energy of PLDD by 10%; the invention reduces the dose of PLDD by 20-30%.

[0028] The reduction of the implantation energy and implantation dose of the oblique implantation can improve OTP interference failure. After reducing the energy and dose of implantation, because the channel length of the select gate (SG) becomes larger, the short channel effect is suppressed, and the leakage of the SG device is reduced. Since the main reason for programming interference is that when programming other OTP units, SG has a small leakage current and is not strict...

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Abstract

The invention discloses a method for improving an OTP performance, which is used for reducing injection energy and injection dose of inclined injection when a P-type lightly doped drain region or a heavily doped P-type region of a PMOS is formed. The method further comprises the step of reducing the thickness of a gate dielectric layer, namely reducing the thickness of the gate side wall, when thegate side wall is made before the P-type lightly doped drain region of the PMOS is formed. According to the method for improving the OTP performance, the OTP performance failure can be improved by reducing the injection energy and the injection dosage of the P-type lightly doped drain region; and by reducing the thickness of the grid side wall, the weak programming performance can be improved. The injection dosage of the N-type lightly doped drain region of the NMOS transistor in the CMOS is reduced, so that the saturated leakage current of the NMOS transistor is adjusted, and the hot carriereffect is reduced. The method also includes adjusting a threshold voltage of the device to a target value by a threshold voltage adjustment injection.

Description

technical field [0001] The invention relates to the field of semiconductor integrated circuits, in particular to a method for improving the OTP performance of memory products. Background technique [0002] In the current semiconductor application field, OTP (One Time Program, one-time programming) has high compatibility with CMOS process, does not increase the number of photolithography layers, and is cheap, and has been favored by many small-capacity product designers. [0003] The current mainstream OTP in the market is a cell unit composed of a PMOS selection transistor and a PMOS floating gate transistor, such as figure 1 As shown, the device contains 4 ports: SG, SL, BL, NW. Since the two tubes are made in the same N-well, there is no consideration of isolation between different wells, and the size of the cell can be made very small, especially for some larger-capacity products, which is more attractive. [0004] The working principle of PMOS OTP: During the read oper...

Claims

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Application Information

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IPC IPC(8): H01L21/8234H01L21/8238
CPCH01L21/8234H01L21/823412H01L21/8238H01L21/823807
Inventor 王乐平
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP