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Time-triggered Ethernet data frame capturing and storing device and method

A time-triggered and storage device technology, applied in the field of network communication, can solve the problem that the capture method cannot meet the debugging and verification requirements of time-triggered Ethernet synchronization and communication functions

Active Publication Date: 2020-05-12
XIAN AVIATION COMPUTING TECH RES INST OF AVIATION IND CORP OF CHINA
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] In order to solve the technical problem that the existing capture method cannot meet the debugging and verification requirements of time-triggered Ethernet synchronization and communication functions at 1Gbps and 10Gbps rates, the present invention provides a time-triggered Ethernet data frame capture, storage device and method

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  • Time-triggered Ethernet data frame capturing and storing device and method
  • Time-triggered Ethernet data frame capturing and storing device and method
  • Time-triggered Ethernet data frame capturing and storing device and method

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Embodiment Construction

[0092] The present invention will be further described below in conjunction with the accompanying drawings.

[0093] like figure 1 As shown, the time-triggered Ethernet data frame capture and storage device of the present invention includes a real-time clock unit, a data management unit, a data cache unit, a capture management unit, a PCIE controller, a PCI interface unit, and N data receiving channels, N≥1 ; Each data receiving channel includes a TTE interface unit, a MAC receiving unit, a filtering control unit, a descriptor queue unit and a data frame queue unit. Each part of the present invention will be described in detail below.

[0094] 1. Capture Management Unit

[0095] The capture management unit obtains the filter control information sent by the host computer through the PCIE controller and the PCI interface unit, including the oversize error frame reception enable signal oversize_en, the unaligned error frame reception enable signal unalign_en, and the check erro...

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Abstract

The invention provides a time-triggered Ethernet data frame capturing and storing device and method, and aims to solve the technical problem that an existing capturing method cannot meet debugging andverification requirements of functions of synchronization, communication and the like of a time-triggered Ethernet with the rates of 1Gbps and 10Gbps. The filtering and capturing problems based on data frame error types, protocol types, virtual links or destination MAC addresses are solved, the real-time filtering and capturing of data frames are realized, and the debugging and verification requirements of functions such as synchronization, communication and the like of the time-triggered Ethernet at 1Gbps and 10Gbps rates are met; data frame descriptors and data frame contents are independently stored, a standard libpcap file can be formed conveniently, the standard libpcap library is used for analysis, the data analysis process is simplified, interruption based on the data buffer lengthor the buffer number is supported, and the method has the advantages that filtering control is flexible, data analysis is simple, and little processor time is occupied in the data transmission process.

Description

technical field [0001] The invention belongs to the technical field of network communication, and relates to a time-triggered Ethernet data frame capture and storage device and method. Background technique [0002] In the Ethernet conforming to the IEEE802.3 standard, the network device uses the event-triggered transmission mechanism, and the network device can access the network at any point in time, and the principle of first-come, first-served is adopted. Communication between network devices through a shared medium will inevitably lead to uncertain jitter and accumulated delays during the transmission of some messages. On the basis of standard Ethernet, ARINC proposed the ARINC664 Part7 standard AFDX network, adding virtual link (VL), bandwidth allocation gap (BAG), jitter management and other mechanisms in the data link layer, effectively reducing the message transmission process. The conflicts make the message real-time and deterministic, thus meeting the reliability ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04J3/06
CPCH04J3/0641H04J3/0658
Inventor 张志平陈长胜刘洋刘智武白杨于峰
Owner XIAN AVIATION COMPUTING TECH RES INST OF AVIATION IND CORP OF CHINA
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