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A low-latency and high-reliability polar code fast decoding method and decoder

A fast decoding and polar code technology, applied in the field of communications, can solve the problems of reduced decoding delay, large decoding delay, etc., to reduce the number of memory blocks, reduce resource consumption, and reduce decoding time delayed effect

Active Publication Date: 2022-02-22
BEIHANG UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, the SCL decoding algorithm is a bit-by-bit serial output algorithm, so the decoding delay is relatively large. In order to reduce the time complexity of the algorithm, some scholars have made further improvements and proposed a simplified multi-bit continuous list deletion ( Simplified Multi-bit Successive Cancellation List (SMSCL)) algorithm [Han J., Liu R, Wang R. Simplified multi-bit SC list decoding for polar codes [C]. IEEE International Conference on Acoustics, Speech and Signal Processing. IEEE, 2016, 996 –1000.], but for a higher code rate, when there are more continuous information bits, the degree of decoding delay reduction will be greatly reduced

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  • A low-latency and high-reliability polar code fast decoding method and decoder
  • A low-latency and high-reliability polar code fast decoding method and decoder
  • A low-latency and high-reliability polar code fast decoding method and decoder

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Embodiment 1

[0047] Embodiment 1: First, taking a polar code with code length N=16 and information bit length K=10 as an example, the implementation method of the improved core code word grouping of the fast multi-node SCL algorithm is described. When M=2, such as Figure 9a , 9b As shown, white circles represent frozen bits, and black circles represent information bits. Figure 9a Represents the codeword grouping result of the original multi-node SCL algorithm, Figure 9b Indicates the code word grouping result of a low-delay and high-reliability polar code fast decoding method proposed by the present invention. According to our previous explanation of the Rate-1 node, Figure 9b S in 6 That is, a Rate-1 node with a length of 4.

[0048] Down Figure 10a , 10b The comparison of polar code frame error and bit error performance under different code rates and different list numbers is given respectively. Taking 1024 code length as an example, 1 / 2( Figure 10a ), 2 / 3( Figure 10b ) tw...

Embodiment 2

[0049] Example 2: figure 2 The overall architecture diagram of the decoder is given, which mainly consists of storage unit (including channel buffer, channel LLR memory, internal LLR memory, frozen set information storage, path information storage unit), node computing unit, routing unit, Rate-1 node A processing unit, a path extension and metric calculation unit, a path pruning unit, a part and network, and a pointer storage unit are formed. The log-likelihood ratio information (LLR) received through the channel is first stored in the channel buffer (Channel Buffer), and then stored in the channel LLR memory according to the designed storage address. The routing unit (RouteUnit) is used to select from which The read data in the LLR memory is sent to the calculation module. After the node calculation is completed, the node type is judged according to the frozen set information, and then enters the path expansion and measurement value calculation module, and the path is delete...

Embodiment 3

[0057] For scenarios with low resource consumption and high performance requirements, the present invention designs another batch processing optimization architecture based on SC network serial-parallel combination, which is a polar code fast decoder based on SC network serial-parallel combination, such as Figure 6a , the architecture includes SC computing network, sorting network (to complete the expansion and pruning of paths), parts and computing units; as Figure 6b , wherein the SC computing network includes an LLR information storage module, a node computing unit, and a routing unit; further, the LLR information storage module includes a channel LLR memory and an internal LLR memory. The logarithmic likelihood ratio information (LLR) received by the decoder from the channel is first stored in the channel LLR memory, the node calculation unit completes the LLR calculation of the internal node, and the result is stored in the internal LLR memory, and the routing unit is us...

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Abstract

The invention discloses a polar code fast decoding method and a decoder with low delay and high reliability; step 1, according to the distribution of polar code information bits and frozen bits, the node meeting the condition is regarded as a Rate-1 node; step 2 , according to the traditional SC decoding butterfly graph f, g node calculation sequence, update the logarithmic likelihood ratio information layer by layer; Step 3, for the length of the code group, f, g nodes calculate to m i layer, judge the type of the code group, if it is a Rate-1 node, go to step 4; otherwise go to step 5; step 4, select the bits at relatively unreliable positions in the node to perform path extension; step 5, perform path extension on all information bits in the code group Carry out path expansion; Step 6, sort the path metrics from small to large, select the L corresponding paths with the smallest path metrics to keep; Step 7, update the part and calculate; Step 8, return to Step 2, until all bit decoding is completed. The invention reduces the decoding time delay and proposes a hardware platform with low logic resource consumption.

Description

technical field [0001] The invention belongs to the communication field, and in particular relates to a polar code fast decoding method and a decoder with low delay and high reliability. Background technique [0002] In 2009, E. Arikan proposed a new channel coding method - polar code, that is, polar code. Polar codes are currently the only channel coding that has been proven to achieve channel capacity. Compared with traditional LDPC codes, polar codes have lower coding and decoding complexity and better coding and decoding performance. Therefore, polar codes have great research value and practical value, and in the 3GPP meeting, polar codes have been determined as the control channel coding scheme for eMBB (enhanced mobile broadband) scenarios in 5G. It can be seen that the application prospect of polar codes is very broad and has the potential for further research. [0003] Since the polar code was proposed in 2009, many scholars at home and abroad have carried out rese...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03M13/25
CPCH03M13/25
Inventor 刘荣科董心洁
Owner BEIHANG UNIV
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