The invention discloses a quasi dynamic Huffman hardware encoder and an encoding method; the encoder receives 2n BCD code data each time for encoding, wherein n is a positive integer; the encoder comprises a ranking network module, a tree building module, a tree parsing module, a cascade FIFO, and an output module; the ranking network module and the cascade FIFO are respectively connected with a 4-bit data input port, a start signal port, a clock port and a low level reset port; the ranking network module, the tree building module, the tree parsing module and the output module are connected in sequence; the cascade FIFO is connected with the output module; the output module is provided with a n+1-bit data output port, a n+1-bit data valid port, a data output start signal port and a data output end signal port. The design result shows that when a Nexys4 DDR platform is used, the encoder can work at a frequency above 100MHz; the encoder is high in throughput, low in delay, high in coding efficiency, and simple in structure.