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An FPGA Implementation Method of Lightweight Deep Convolutional Neural Network

A deep convolution and neural network technology, applied in the field of FPGA implementation of lightweight deep convolutional neural networks, can solve the problem of high resource occupancy of programmable logic gate array FPGA, avoid excessive resource occupancy and simplify the network effect of structure

Active Publication Date: 2022-04-19
XIDIAN UNIV
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Problems solved by technology

[0004] The object of the present invention is to aim at the deficiencies in the above-mentioned prior art, propose a kind of FPGA implementation method of lightweight deep convolutional neural network, be used to solve the method for realizing deep convolutional neural network in programmable logic gate array FPGA When the level of the network structure is deep, the resource occupation of field programmable logic gate array FPGA is too high for technical problems

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  • An FPGA Implementation Method of Lightweight Deep Convolutional Neural Network
  • An FPGA Implementation Method of Lightweight Deep Convolutional Neural Network
  • An FPGA Implementation Method of Lightweight Deep Convolutional Neural Network

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[0061] The present invention will be further described below in conjunction with the accompanying drawings.

[0062] Refer to attached figure 1 , to further describe the specific steps of the present invention.

[0063] Step 1. Build a lightweight deep convolutional neural network.

[0064] Build a lightweight deep convolutional neural network, its structure is as follows: input layer→1st convolutional layer→depth separable convolution module combination→feature space fusion module→2nd convolutional layer→output layer.

[0065] The depth-separable convolution module combination is composed of four depth-separable convolution modules with the same structure in series, and the structure of each depth-separable convolution module is as follows: the first pointwise convolution layer→the depth convolution layer→the second 2 pointwise convolutional layers.

[0066] The feature space fusion module is composed of a pointwise convolution layer and an average pooling layer connected ...

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Abstract

The present invention proposes an FPGA implementation method of a lightweight deep convolutional neural network, the steps of which are: constructing a lightweight deep convolutional neural network; initializing a lightweight deep convolutional neural network; generating a training set and a verification set; Train lightweight deep convolutional neural networks; design the basic components of lightweight convolutional neural networks in FPGAs; implement trained lightweight deep convolutions in FPGAs product neural network. The present invention simplifies the network structure of the deep convolutional neural network by building a lightweight deep convolutional neural network, optimizes the training method of the lightweight deep convolutional neural network, and improves the implementation in the Field Programmable Logic Gate Array FPGA. Resource utilization of deep convolutional neural networks.

Description

technical field [0001] The invention belongs to the technical field of image processing, and further relates to an FPGA implementation method of a lightweight deep convolutional neural network in the technical field of digital image pattern recognition. The invention can be used to realize a lightweight deep convolutional neural network on a field programmable logic gate array FPGA (Field Programmable Gate Array). Background technique [0002] In recent years, with the rapid development of deep learning, artificial intelligence has gradually been integrated into various fields. Among them, the algorithm model based on deep convolutional neural network DCNN (Deep Convolutional Neural Network) has the advantage of higher accuracy compared with other deep learning network frameworks, and has been widely concerned since it was proposed in 2015. So far, the deep convolutional neural network model is one of the most abundant neural network models, but it is rarely implemented on ...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06N3/08G06N3/04G06K9/62
CPCG06N3/08G06N3/045G06F18/214
Inventor 雷杰高岳李云松谢卫莹杜旭飞赵东升
Owner XIDIAN UNIV
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