An FPGA Implementation Method of Lightweight Deep Convolutional Neural Network
A deep convolution and neural network technology, applied in the field of FPGA implementation of lightweight deep convolutional neural networks, can solve the problem of high resource occupancy of programmable logic gate array FPGA, avoid excessive resource occupancy and simplify the network effect of structure
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[0061] The present invention will be further described below in conjunction with the accompanying drawings.
[0062] Refer to attached figure 1 , to further describe the specific steps of the present invention.
[0063] Step 1. Build a lightweight deep convolutional neural network.
[0064] Build a lightweight deep convolutional neural network, its structure is as follows: input layer→1st convolutional layer→depth separable convolution module combination→feature space fusion module→2nd convolutional layer→output layer.
[0065] The depth-separable convolution module combination is composed of four depth-separable convolution modules with the same structure in series, and the structure of each depth-separable convolution module is as follows: the first pointwise convolution layer→the depth convolution layer→the second 2 pointwise convolutional layers.
[0066] The feature space fusion module is composed of a pointwise convolution layer and an average pooling layer connected ...
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