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Semiconductor assembly and manufacturing method thereof

A manufacturing method and semiconductor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electric solid-state devices, etc., can solve problems such as low withstand voltage

Pending Publication Date: 2020-07-07
WUXI U NIKC SEMICON CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the existing semiconductor power components already have a relatively low withstand voltage after integrating the ESD protection structure, and it is even more difficult to comply with the current industry trend

Method used

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  • Semiconductor assembly and manufacturing method thereof
  • Semiconductor assembly and manufacturing method thereof
  • Semiconductor assembly and manufacturing method thereof

Examples

Experimental program
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Embodiment Construction

[0022] see figure 1 . figure 1 It is a flowchart of a manufacturing method of a semiconductor device according to an embodiment of the present invention. Specifically, the present invention provides a method for manufacturing a semiconductor component with an electrostatic protection layer, which at least includes the following steps.

[0023] In step S100 , an epitaxial layer is formed on a substrate, wherein the epitaxial layer is divided into at least a device area and an electrostatic protection area. In step S110 , a first body region and a second body region are formed in the component region and the electrostatic protection region respectively. In step S120, a stacked structure located in the electrostatic protection area is formed on the surface of the epitaxial layer, the stacked structure includes an insulating layer and a semiconductor layer located on the insulating layer, wherein the semiconductor layer has a first heavily doped Miscellaneous area. In step S13...

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PUM

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Abstract

The invention discloses a semiconductor assembly and a manufacturing method thereof. The manufacturing method of the semiconductor assembly at least comprises the following steps: forming an epitaxiallayer on a substrate, wherein the epitaxial layer is divided into at least one component region and an electrostatic protection region; forming a first matrix region in the component region, and forming a second matrix region in the electrostatic protection region; forming a laminated structure located in the electrostatic protection region on the surface of the epitaxial layer, the laminated structure comprises an insulating layer and a semiconductor layer located on the insulating layer, wherein the semiconductor layer is provided with a first heavily-doped region and then forms at least one second heavily-doped region, the first heavily-doped region and the second heavily-doped region form an electrostatic protection layer together, the electrostatic protection layer is located above the second substrate region, and the electrostatic protection layer is completely overlapped in the range of the second substrate region.

Description

technical field [0001] The invention relates to a semiconductor component and a manufacturing method thereof, in particular to a semiconductor component with an electrostatic protection layer and a manufacturing method thereof. Background technique [0002] In the field of application of semiconductor power components, the ability of semiconductor power components to protect against electrostatic discharge has become an important indicator. Due to the small chip size of some small-signal semiconductor power components, their ability to protect against electrostatic discharge is poor, and they cannot even meet the minimum standard for electrostatic discharge protection. Although some semiconductor power components have a larger chip size and can have a greater electrostatic discharge protection capability, they may need to be used in a harsh environment (such as: a dry environment with a relative humidity <65%, or an environment with a lot of dust) Therefore, there are hi...

Claims

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Application Information

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IPC IPC(8): H01L29/06H01L27/02H01L29/78H01L21/336
CPCH01L27/0251H01L27/0296H01L29/0603H01L29/0611H01L29/0684H01L29/66477H01L29/78
Inventor 李立民徐献松
Owner WUXI U NIKC SEMICON CO LTD
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