Method and system for accelerating storage component netlist simulation and medium

A technology for storage components and storage subsystems, applied in software testing/debugging, instrumentation, electrical digital data processing, etc., can solve problems such as difficulties in observing internal node waveforms, achieve shortened simulation verification cycle, long compilation time, and speed up Effect

Active Publication Date: 2020-07-17
PHYTIUM TECH CO LTD
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Problems solved by technology

The speed of post-simulation is much slower than that of pre...

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  • Method and system for accelerating storage component netlist simulation and medium
  • Method and system for accelerating storage component netlist simulation and medium
  • Method and system for accelerating storage component netlist simulation and medium

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Embodiment Construction

[0031] The method, system and medium for accelerating netlist simulation of storage components of the present invention will be further described in detail below by taking the DDR4 storage subsystem as an example. Undoubtedly, the method, system and medium for accelerating storage component netlist simulation of the present invention are not limited to DDR4 storage subsystems, and can also be used for older storage subsystems such as DDR3 storage subsystems, DDR5 storage subsystems, and The updated storage subsystem will not be repeated here.

[0032] Such as figure 1 As shown, the implementation steps of the method for accelerating storage component netlist simulation in this embodiment include:

[0033] 1) Establish a verification environment for the storage subsystem, such as image 3 with Figure 4 As shown, the verification environment of the storage subsystem includes the data channel stimulus module, the first register channel stimulus module (represented as register...

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Abstract

The invention discloses a method and system for accelerating storage component netlist simulation and a medium, and the method comprises the steps of enabling an original RTL design of a storage subsystem to be integrally replaced with a storage subsystem netlist in a verification environment of the subsystem; register configuration irrelevant to operation of the simulation test program in the memory controller and the memory physical interface is reduced; the clock frequency configured by registers in a memory controller and a memory physical interface is increased to the highest clock frequency tolerable by physical design, and the registers in the memory controller and the memory physical interface are independently configured in a forced assignment mode. The RTL verification environment of the original storage subsystem can be used, the original test case can be inherited, the original correctness checking mechanism is continuously used, and the development cost of the post-simulation verification environment is reduced. According to the method, the register configuration time can be shortened, a large amount of manpower and time cost is saved, the netlist simulation efficiencyis greatly improved, and the project period is shortened.

Description

technical field [0001] The invention relates to netlist simulation and timing inspection technology of storage subsystems of integrated circuits, in particular to a method, system and medium for accelerating netlist simulation of storage components. Background technique [0002] Memory is an important factor driving the development of the entire electronics industry. With the continuous improvement of processor performance, the rapid development of semiconductor technology and VLSI, more and more applications will require larger capacity, higher speed storage devices and storage management systems to meet their data storage needs. At present, DDR4 SRAM, as a new generation of memory, has higher performance, larger DIMM capacity, stronger data integrity and lower energy consumption. It has been more and more widely used. The corresponding controller has flexible adaptability, High reliability and good reusability have become the mainstream of hardware design. The storage ma...

Claims

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Application Information

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IPC IPC(8): G06F11/36
CPCG06F11/3684Y02D10/00
Inventor 罗健美杨俊庞守雷李永进王英
Owner PHYTIUM TECH CO LTD
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