Memory device and manufacturing method thereof
A technology of a storage device and a manufacturing method, applied in the field of storage, can solve the problems of storage cell tilt, storage cell pressure, channel column alignment verification deviation, etc., and achieve the effects of avoiding influence, reducing accuracy and good adjustment effect.
Active Publication Date: 2021-07-16
YANGTZE MEMORY TECH CO LTD
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Problems solved by technology
However, as the number of stacked memory cell layers increases, the thickness of the filling layer increases accordingly, so the stress of the filling layer is also increasing. The stress will not only affect the bow of the wafer substrate, but also affect the Stresses the memory cell (GB), causing the memory cell to tilt, which in turn causes deviations in the alignment verification of the channel pillars
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[0027] Various embodiments of the invention will be described in more detail below with reference to the accompanying drawings. In the various drawings, the same elements are denoted by the same or similar reference numerals. For the sake of clarity, various parts in the drawings have not been drawn to scale.
[0028] Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings. In the various figures, identical elements are indicated with similar reference numerals. For the sake of clarity, various parts in the drawings have not been drawn to scale. Also, some well-known parts may not be shown. For the sake of simplicity, the semiconductor structure obtained after several steps can be described in one figure.
[0029] It should be understood that when describing the structure of a device, when a layer or a region is referred to as being "on" or "over" another layer or another region, it may mean being directly on another ...
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A storage device and a manufacturing method thereof are disclosed. The device includes: a substrate, the substrate includes a device region and a cutting region, and the cutting region is located on one side of the device region; A storage unit, the storage unit is located in the device area; a filling layer covering part of the storage unit and the cutting area; and a cavity located in the filling layer. The storage device of the present application releases the stress of the filling layer by forming a cavity in the filling layer, avoiding the difficult control of wafer warpage caused by excessive stress of the filling layer and the alignment verification of the channel hole in the memory cell The problem of offset improves the yield and reliability of the device.
Description
technical field [0001] The present invention relates to the field of memory technology, in particular to a memory device and a manufacturing method thereof. Background technique [0002] The improvement of the storage density of the memory device is closely related to the progress of the semiconductor manufacturing process. As the feature size of the semiconductor manufacturing process becomes smaller and smaller, the storage density of the memory device becomes higher and higher. In order to further increase storage density, memory devices with a three-dimensional structure (ie, 3D memory devices) have been developed. A 3D memory device includes a plurality of memory cells stacked in a vertical direction, which can double the integration level on a wafer per unit area and reduce the cost. [0003] In a 3D storage device with a NAND structure, a stacked structure is used to provide gate conductors of a selection transistor and a storage transistor, and a single channel gro...
Claims
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IPC IPC(8): H01L27/11524H01L27/11529H01L27/1157H01L27/11573H01L21/56H01L23/31H10B41/35H10B41/41H10B43/35H10B43/40
CPCH01L23/315H01L21/56H10B41/35H10B41/41H10B43/35H10B43/40
Inventor 杨竹刘新鑫耿静静
Owner YANGTZE MEMORY TECH CO LTD