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Cloud deep neural network optimization method based on CPU and FPGA cooperative computing

A deep neural network and optimization method technology, applied in the field of computer architecture design, can solve the problems of high data communication overhead, poor flexibility, and low cost performance, and achieve the effects of reducing power consumption, improving performance, and low price

Pending Publication Date: 2020-08-04
FUDAN UNIV
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The purpose of the present invention is to provide a cloud-based deep neural network optimization method based on CPU and FPGA collaborative computing to solve the problems of high energy consumption, low cost performance, poor flexibility, and data communication problems in the processing of deep learning algorithms in current large-scale server clusters. high cost etc.

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  • Cloud deep neural network optimization method based on CPU and FPGA cooperative computing
  • Cloud deep neural network optimization method based on CPU and FPGA cooperative computing
  • Cloud deep neural network optimization method based on CPU and FPGA cooperative computing

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Embodiment Construction

[0019] In order to clearly illustrate the technical features of this solution, the present invention will be described in detail below through specific implementation modes and in conjunction with the accompanying drawings. The following disclosure provides many different embodiments or examples for implementing different structures of the present invention. Descriptions of well-known components and processing techniques and processes are omitted herein to avoid unnecessarily limiting the present invention.

[0020] The present invention provides an optimized method for implementing a deep neural network on a server component comprising a host component having a CPU and a hardware acceleration component connected to the host component; the deep neural network comprising a plurality of layers. The method includes: dividing into two parts respectively suitable for the front and rear ends. The data received by the front end is in the form of a data stream, and the DDR shuttles b...

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Abstract

The invention belongs to the technical field of computer system structure design, and particularly relates to a cloud deep neural network optimization method based on CPU and FPGA cooperative computing. The method is divided into a front end part and a rear end part. The front end is a server taking a CPU as a core and is responsible for flow control, data receiving and partial processing; and therear end is an acceleration component taking the FPGA as a core, comprises a large-scale parallel processor array, a graphic processing unit, an application-specific integrated circuit and a PCI-E interface, and is responsible for parallel acceleration processing and the like of a key layer of the deep neural network. Firstly, the deep neural network is divided into two parts suitable for front-end processing and rear-end processing according to different levels; the front end shuttles the received data between the front end and the rear end by DDR in the form of a data stream to process eachlayer or a combined layer. The front-end flexible process control is matched with the rear-end efficient parallel structure, so that the energy efficiency ratio of neural network calculation can be greatly improved.

Description

technical field [0001] The invention belongs to the technical field of computer architecture design, and in particular relates to a cloud deep neural network optimization method based on CPU and FPGA collaborative computing. Background technique [0002] In the process of human-computer interaction where multiple interaction modes coexist, interactive modal data with different characteristics and corresponding deep learning models, such as convolutional neural networks (CNNs for short) models, etc., will be generated to construct deep learning Algorithms require long hours and large computing resources. The current mainstream computing architecture includes the following three types: GPU, FPGA, and application-specific custom chip (ASIC). [0003] GPUs were originally designed for generating computer graphics based on polygonal networks, and in fact these processors are also well suited for running neural networks and matrix multiplication calculations. But each GPU also c...

Claims

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Application Information

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IPC IPC(8): G06F1/3287G06F9/50G06N3/08
CPCG06F1/3287G06F9/5027G06N3/08Y02D10/00
Inventor 卢暾常玉虎顾宁
Owner FUDAN UNIV
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