An Analytical Layout Method Considering Electron Beam Atomization Effect
A layout method and electron beam technology, applied in the direction of electrical digital data processing, special data processing applications, instruments, etc., can solve the problems of layout pattern distortion, bad exposure, etc., achieve line length shortening, reduce atomization effect, and reduce layout lines long effect
Active Publication Date: 2022-07-22
福州立芯科技有限公司
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like image 3 Poor exposure from these effects can distort the layout pattern as shown in (c)
This unwanted exposure caused by scattered electrons can change critical dimensions by a few nanometers, which can lead to serious defects in advanced integrated circuit designs
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[0049] The present invention will be further described below with reference to the accompanying drawings and specific embodiments.
[0050] figure 1 It is the realization flow chart of the analytical layout method considering the electron beam atomization effect of the present invention. A kind of analytical layout method considering electron beam atomization effect provided by the present invention comprises the following steps:
[0051] (1) Layout frame, ie figure 1 "Global Layout with Fog" section in
[0052] Use the Λ-type multi-layer framework to handle large-scale designs in layout for global layout.
[0053] Among them, the Λ-type multilayer framework consists of three main stages: clustering, initial layout and clustering; during clustering, standard cells are firstly clustered iteratively according to cell area and connectivity until the number of clusters is within a threshold, so that the effective Place the clusters; then perform an initial placement on the c...
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The present invention relates to an analytical layout method considering electron beam atomization effect, comprising the following steps: 1. Layout frame: use a Λ-type multi-layer frame to handle large-scale design in layout to perform global layout; 2. Atomization changes Modeling: Sampling evaluation points, which are evenly distributed in the entire layout; using the evaluation points of the fog source model, estimate the fogging effect of each evaluation point through a fast Gaussian transformation with Hermite expansion; 3. Setting An objective function that considers both line length optimization and atomization change optimization; 4. Optimize the layout line length through the conjugate gradient algorithm; 5. Remove overlapping cell parts and align standard cells to preserve the global as much as possible The layout results obtained by the layout; 6. Detailed layout, by calculating the exchange area change coefficient, to decide whether to exchange in the selected standard unit. This method is beneficial to optimize the layout quality and reduce the fogging variation while optimizing the line length.
Description
technical field [0001] The invention belongs to the technical field of ultra-large-scale integrated circuit design, and in particular relates to an analytical layout method considering the atomization effect of electron beams. Background technique [0002] As feature sizes continue to shrink, traditional optical lithography presents new challenges. The resolution of lithography techniques using 193 nm wavelength light is limited due to light diffraction. How to explore next-generation lithography (NGL) technology to further expand the technology scale has become a new-generation research direction. Among these NGL techniques, electron beam (e-beam) lithography (EBL) is a promising technique. Electron beams can be focused to nanometer diameters by employing electromagnetic or electrostatic lenses. In addition, direct writing enables EBL to print feature patterns directly on the wafer without a mask, so it is not limited by light diffraction. [0003] Electron beam lithogr...
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IPC IPC(8): G06F30/3947
CPCG06F30/3947
Inventor 陈建利黄志鹏
Owner 福州立芯科技有限公司