CAN bus controller parallel test method

Abstract

The invention relates to a CAN (Controller Area Network) bus controller parallel test method, which belongs to the technical field of electronic component detection, and solves the problems that an existing CAN bus controller test cannot realize real working state consideration, debugging and writing test of a PATTERN (Public Advanced Telecommunication Terrestrial Radio Network) is tedious and difficult. The method comprises the steps of acquiring a current test mode; if the test mode belongs to the CAN bus system test mode, connecting a first channel, and using a test machine for testing theCAN bus controller in a corresponding working mode; and if the test mode belongs to the test mode of the single-chip CAN bus controller, connecting a second channel, and testing the CAN bus controllerin a corresponding working mode by using a test machine. The CAN bus system test mode comprises at least one test mode of a message transceiving test, a message filtering test and a bus arbitration test. The single-chip CAN bus controller test mode comprises at least one test mode of a sending error test, a receiving error test and a node closing test.

Description

technical field [0001] The invention relates to the technical field of electronic component detection, in particular to a CAN bus controller parallel testing method. Background technique [0002] CAN bus controller is a controller device with powerful functions and many internal registers. Its testing has always been a difficult problem in the industry. Even if some organizations can complete the simple function test of sending and receiving messages, they cannot traverse the numerous resource modules and various internal registers. a processing mechanism. [0003] The test of a single-chip digital device generally directly connects the device pins to the digital channel, connects the power supply and ground of the device to the DPS and GND of the test system to supply power for the device, and there will be some auxiliary capacitors in the process of making the test interface board to filter. During the test process, the device input pins are generally read, written, and ...

AI Technical Summary

Problems solved by technology

[0006] However, in the existing test method, there is only the physical connection between the digital channel of the test machine and the CAN bus controller pins during the test, and there is no actual CAN bus, nor can the CAN bus transceiver and other nodes. During the process, the test machine should not only simulate the CPU to configure the registers of the bus controller, but also simulate the complete CAN environment (mainly simulate the "high and low levels" of the data sent back from the RX end), and each cycle should be combined with the CAN actual The bus environment is given

[0007] Therefore, the test method of the CAN bus controller in the prior art cannot consider its real working state on the one hand; on the other hand, the process of debugging and writing the test pattern is too cumbersome and difficult

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