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Array substrate, preparation method thereof and display panel

A technology of array substrates and capacitor plates, which is applied in semiconductor/solid-state device manufacturing, electrical components, electric solid-state devices, etc., can solve the problem of small overlapping area between source and drain layers and IGZO, low yield rate of GSDTFT, and low success rate of sidecontact And other issues

Active Publication Date: 2020-08-25
SHENZHEN CHINA STAR OPTOELECTRONICS SEMICON DISPLAY TECH CO LTD
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Problems solved by technology

[0004] The embodiment of the present application provides an array substrate and its preparation method, and a display panel, which are used to solve the problem that the existing GSD TFT has a small overlapping area between the source and drain layers and IGZO, which leads to a low success rate of side contact and a low yield rate of GSD TFT. lower technical issues

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  • Array substrate, preparation method thereof and display panel
  • Array substrate, preparation method thereof and display panel
  • Array substrate, preparation method thereof and display panel

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Embodiment Construction

[0047] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Apparently, the described embodiments are only some of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without making creative efforts belong to the scope of protection of this application.

[0048] In the description of the present application, it should be understood that the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", " Orientation indicated by rear, left, right, vertical, horizontal, top, bottom, inside, outside, clockwise, counterclockwise, etc. The positional relationship is based on the orientation or positional relationship shown in the drawings, which is only for the convenience of describing the a...

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Abstract

The embodiment of the invention provides an array substrate, a preparation method thereof and a display panel. According to the array substrate, the width of a conductor part is greater than that of ablank part, the width of a region where a first conductor region and a second conductor region are in contact with each other is equal to the difference between the width of the conductor part and the width of the blank part, and the difference between the width of the conductor part and the width of the blank part is greater than a preset value; when the blank part is etched, since the width ofthe conductor part is greater than that of the blank part, the conductor part can still be conducted from the two sides of the blank part, and the first conductor region and the second conductor region can still be conducted; and therefore, the overlapping area of the source and drain electrodes and the conductor part is increased, the achievement rate of the side contact is increased, the GSD TFT can work normally, and the technical problems that the overlapping area of the source and drain layers and IGZO of an existing GSD TFT is small, so that the success rate of side contact is low, andthe yield of the GSD TFT is low are solved.

Description

technical field [0001] The present application relates to the field of display technology, in particular to an array substrate, a manufacturing method thereof, and a display panel. Background technique [0002] The existing GSD TFT (Gate, Source, Drain one Layer Thin Film Transistor, a thin film transistor whose gate, source, and drain are on the same layer) has one less metal film formation / Photolithography / etching and interlayer insulating layers reduce costs and are widely used in display devices. However, in GSD TFTs, since the material of GSD is a low-resistance metal, it cannot be formed by dry etching. When wet etching, metal etching Liquid will contact with IGZO (indium gallium zinc oxide, indium gallium zinc oxide) active layer, causing IGZO to be corroded, thus affecting the conduction between source and drain and IGZO, so the conduction between source and drain and IGZO in GSD TFT is mainly Rely on side contact, that is, edge connection, but due to the limited s...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/12H01L27/32H01L29/417H01L29/423H01L21/77
CPCH01L29/41733H01L29/42376H01L27/1225H01L27/1255H01L27/127H10K59/1213H01L29/78618
Inventor 唐甲徐源竣
Owner SHENZHEN CHINA STAR OPTOELECTRONICS SEMICON DISPLAY TECH CO LTD
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