Extraction method of source-drain resistance of field effect transistor

Abstract

The invention discloses a method for extracting source-drain resistance of a field effect transistor, comprising the steps of: step 1: testing to obtain a first electrical characteristic curve formed by the absolute value of the drain current and the gate voltage of the linear region of the field effect transistor, and extracting the linear region threshold voltage; step 2, select multiple sampling points in the high grid voltage region, calculate the reciprocal of the absolute value of the difference between the grid voltage corresponding to each sampling point and the threshold voltage in the linear region and use it as the first parameter; step 3, calculate each sampling point The ratio of the drain voltage and the drain current is taken as the total resistance; step 4, form a second relationship curve according to the first parameter and total resistance of each sampling point; step 5, extend the second relationship curve and intersect it with the vertical axis, Take the intercept as the source-drain resistance. The invention can extract the source-drain resistance for a single transistor, and is suitable for field effect transistors with uniform or non-uniform channel doping, which not only saves the test area, but also improves the test speed and the resistance extraction precision.

Description

technical field [0001] The invention relates to a method for manufacturing a semiconductor integrated circuit, in particular to a method for extracting the source-drain resistance of a field effect transistor. Background technique [0002] like figure 1 Shown is a schematic diagram of the composition of the total resistance of the field effect transistor; the field effect transistor includes a source region 102 , a drain region 103 , a channel region and a gate structure 104 . figure 1 In the figure, the source region 102 is also represented by Source, the drain region 103 is also represented by Drain, and the gate structure 104 is also represented by Gate. [0003] The source region 102 and the drain region 103 are formed in the semiconductor substrate 101 on both sides of the gate structure 104, and the channel region is located between the source region 102 and the drain region 103 and is surrounded by The area covered by the gate structure 104 . [0004] The source re...

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Problems solved by technology

However, the premise of using this existing extraction method is to assume that the transistor channel is uniformly doped

However, in short-channel devices, the halo effect in shallow doping technology, that is, the formation of the halo implantation region will cause uneven channel doping of the transistor, and the method of using the gate length array to extract the source-drain resistance will bring big error

Secondly, this method needs to design and layout several transistors with different channel lengths, which not only occupies the chip area, but also makes the test time doubled according to the transistor data, which is a waste of space and time

Finally, for a particular transistor, this method cannot extract the source-drain resistance of a single transistor

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