Method for improving operation efficiency of circuit design tuning tool
A technology of circuit design and electronic design, which is applied in the field of improving the operating efficiency of circuit design tuning tools, and can solve problems such as large number of iterations, long running time of tuning tools, and complex calculations
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[0031] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments It is a part of embodiments of the present invention, but not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.
[0032] As mentioned above, in the existing field programmable gate array circuit design and optimization methods, the parameters corresponding to the operations of various stages such as synthesis, layout, and wiring are mixed together, resulting in complex optimization calculations, a large number of searches and iterations, and optimization ...
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