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Method for improving operation efficiency of circuit design tuning tool

A technology of circuit design and electronic design, which is applied in the field of improving the operating efficiency of circuit design tuning tools, and can solve problems such as large number of iterations, long running time of tuning tools, and complex calculations

Active Publication Date: 2020-09-01
HERCULES MICROELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Because the parameters corresponding to the operations of the above-mentioned stages in the tuning process are mixed together, the calculation in the process is complicated and the number of iterations is large, resulting in a long running time of the tuning tool

Method used

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  • Method for improving operation efficiency of circuit design tuning tool
  • Method for improving operation efficiency of circuit design tuning tool
  • Method for improving operation efficiency of circuit design tuning tool

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Embodiment Construction

[0031] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments It is a part of embodiments of the present invention, but not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0032] As mentioned above, in the existing field programmable gate array circuit design and optimization methods, the parameters corresponding to the operations of various stages such as synthesis, layout, and wiring are mixed together, resulting in complex optimization calculations, a large number of searches and iterations, and optimization ...

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Abstract

The embodiment of the invention provides an adjusting and optimizing method for field programmable gate array circuit design, which comprises the following steps of modifying comprehensive parametersfor a preset number of times, and operating a comprehensive process after each modification to obtain a comprehensive result generated by the comprehensive process; selecting the comprehensive resultwith the minimum logic depth as an intermediate comprehensive result from the comprehensive results generated in each comprehensive process; utilizing the intermediate comprehensive result, modifyingthe operation parameters of other stages except for the comprehensive stage in the tuning process, and operating the processes of other stages to generate an optimization result; if the optimization result reaches the preset optimization condition, ending the tuning process, if the optimization result does not reach and does not exceed the preset judgment frequency, continuing to execute other process parameter modification and operation, and if the optimization result does not reach and exceeds the preset judgment frequency, continuing to execute comprehensive parameter modification and operation; and outputting optimization results. According to the method, a large number of iteration and search steps in an existing tuning method are reduced, the operation complexity of the tuning tool is reduced, and the operation speed of the tuning tool is increased.

Description

technical field [0001] The invention relates to the technical field of field programmable logic gate array (Field Programmable Gate Array, FPGA) chip design, in particular to a method for improving the operating efficiency of a circuit design and tuning tool. Background technique [0002] FPGA, Field Programmable Gate Array (Field Programmable Gate Array) is a logic device composed of many logic units. After manufacturing, the FPGA can be reprogrammed according to the required application or functional requirements. As a semi-custom circuit, it has rich hardware resources, powerful parallel processing capability and flexible reconfigurable capability, and has a wide range of applications in many fields such as data processing, communication, and network. [0003] The FPGA design process usually includes: design entry, debugging, functional simulation, synthesis, layout and routing, timing simulation, configuration download and other steps. The design process of modern FPGAs...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F30/343G06F30/347
CPCG06F30/343G06F30/347Y02P90/02
Inventor 靳松王海力
Owner HERCULES MICROELECTRONICS CO LTD
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