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Adaptive variable gain delay amplifier

A self-adapting, amplifier technology, applied in amplifiers, improving amplifiers to reduce noise effects, gain control, etc., can solve the problems of small linear range of delay amplifiers, and achieve the effects of good PVT fluctuation, controllable gain, and simple structure

Active Publication Date: 2020-09-15
SHANGHAI JIAO TONG UNIV
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  • Abstract
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] For the defective in the prior art, the purpose of the present invention is to provide a kind of self-adaptive variable gain time-delay amplifier, it combines the amplifying circuit based on the metastable state effect of SR latch with the self-adaptive pulse constriction circuit, Solve the problem that the linear range of the existing delay amplifier is small

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  • Adaptive variable gain delay amplifier
  • Adaptive variable gain delay amplifier
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Embodiment Construction

[0034] The present invention will be described in detail below in conjunction with specific embodiments. The following examples will help those skilled in the art to further understand the present invention, but do not limit the present invention in any form. It should be noted that those skilled in the art can make several changes and improvements without departing from the concept of the present invention. These all belong to the protection scope of the present invention.

[0035] like figure 2 As shown, the present invention provides an adaptive variable gain delay amplifier, which includes a dual-channel adaptive pulse contraction circuit and a variable gain delay amplifier circuit. The dual-path adaptive pulse contraction circuit is used to receive two-way pulse signals IN1 and IN2, and shrink the delay between the two-way pulse signals when the delay of the two-way pulse signals is greater than the threshold value, so that the delay is adapted to The input variable r...

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Abstract

The invention provides an adaptive variable gain delay amplifier, which comprises a double-path adaptive pulse shrinking circuit and a variable gain delay amplifying circuit, wherein the double-path adaptive pulse shrinking circuit is used for receiving two paths of pulse signals and shrinking the delay between the two paths of pulse signals when the delay of the two paths of pulse signals is greater than a threshold value, so that the delay of the two paths of pulse signals is adaptive to the input variable range of the variable gain delay amplifying circuit; and the variable gain delay amplifying circuit is used for amplifying the delay of the two paths of pulse signals output by the two paths of adaptive pulse shrinking circuits based on the metastable state effect of the RS latch. Theimplementation and control mode of the delay amplifier provided by the invention has the advantages of simple structure, controllable gain and strong stability; a mode of preprocessing input by adopting a double-path adaptive pulse shrinking unit is adopted, the linear interval and the dynamic gain are improved, and the gain is controllable.

Description

technical field [0001] The present invention relates to the field of semiconductor integrated circuits, in particular to a delay amplifier, in particular to an adaptive variable gain delay amplifier. Background technique [0002] As complementary metal-oxide-semiconductor (CMOS) technology progresses below 10nm, voltage-signal-based designs become more challenging due to reduced gain, increased leakage current, and reduced signal power. The reduction of the process makes the delay of the gate smaller, and the use of delay information for information processing becomes more competitive. The processing technology based on delay information can better adapt to the development trend of IC design towards smaller area, higher integration density and faster switching speed. In time-domain information processing, a time-to-digital converter (TDC), as a front-end module, is responsible for quantifying the time interval between two rising edges and extracting the information therein....

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03G3/30H03F1/26H03F1/32
CPCH03G3/30H03F1/26H03F1/3205
Inventor 蒋剑飞李金昊王琴景乃锋绳伟光贺光辉
Owner SHANGHAI JIAO TONG UNIV