Semiconductor process method

A process method, semiconductor technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., which can solve problems such as resolution reduction and etching barrier

Inactive Publication Date: 2020-10-27
SIEN QINGDAO INTEGRATED CIRCUITS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] In view of the above-mentioned shortcomings of the prior art, the purpose of the present invention is to provide a semiconductor process met

Method used

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  • Semiconductor process method
  • Semiconductor process method
  • Semiconductor process method

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Embodiment Construction

[0044] Embodiments of the present invention are described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation modes, and various modifications or changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention.

[0045] see Figure 1 to Figure 11 . It should be noted that the diagrams provided in this embodiment are only schematically illustrating the basic concept of the present invention, although only the components related to the present invention are shown in the diagrams rather than the number, shape and Dimensional drawing, the shape, quantity and proportion of each component can be changed arbitrarily during actual implementation, and...

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Abstract

The invention provides a semiconductor process method, which comprises the following steps: 1) providing a substrate; 2) forming a to-be-etched material layer on the substrate, wherein the upper surface of the to-be-etched material layer has a height difference; 3) forming an anti-reflection layer on the upper surface of the to-be-etched material layer; 4) forming a positive photoresist layer on the upper surface of the anti-reflection layer; 5) performing selective exposure to form an exposure area and an unexposed area on the positive photoresist layer; 6) carrying out negative development to remove the positive photoresist in the unexposed area; 7) forming an acidified region on the surface of the positive photoresist layer, wherein the acidified region comprises a polymer capable of reacting with silicon-containing gas; 8) processing the acidified region by adopting silicon-containing gas to convert the acidified region into a mask layer; and 9) removing the anti-reflection layer and the to-be-etched material layer. According to the invention, the method can be effectively used for manufacturing the ultra-fine pattern with the high step difference, the size precision of a device can be guaranteed, the pattern quality can be improved, the process production yield can be improved, and the production cost can be reduced.

Description

technical field [0001] The invention belongs to the field of semiconductor manufacturing, and in particular relates to a semiconductor process method. Background technique [0002] In the semiconductor chip manufacturing process, due to various reasons, the upper surface of the material layer to be etched formed on the substrate has a height difference, that is, the upper surface of a part of the material layer to be etched is higher than other areas of the same layer. And a step height is formed at the high-low junction. The existence of the step difference will add a lot of difficulty to the process, for example, it is easy to cause uneven film deposition in the film deposition process, and it is easy to cause differences in the etching rate in the etching process. Among them, the adverse effects of the step difference on the photolithography process are particularly prominent. For example, the step difference is likely to cause defocus, sub-resolution and affect the etch...

Claims

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Application Information

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IPC IPC(8): H01L21/027
CPCH01L21/0274H01L21/0276
Inventor 李天慧王科
Owner SIEN QINGDAO INTEGRATED CIRCUITS CO LTD
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