Multi-strategy high-precision clock synchronization edge computing server design method

Abstract

The invention discloses a multi-strategy high-precision clock synchronization edge computing server design method. The method comprises a network synchronization mode, a cascading mode and a mode thatPCIe equipment acquires a timestamp. An intel Xeon-D processor is used as a processor of an edge server for high-precision clock synchronization, clock synchronization is performed by using a network, and each edge server acquires timestamp information through the network; and a corresponding PLL IC is selected to process the PPS + TOD information during cascading, and high-precision clock synchronization is carried out. The server in the method is compatible with multiple clock synchronization schemes, different clock synchronization schemes are selected according to the application environment, and the purpose of high adaptability is achieved; a server processor and a clock synchronization scheme are combined, the server processor is utilized to the maximum extent, and the high-efficiency purpose is achieved; the clock synchronization of the network card is optimized, and the purpose of high precision is achieved.

Description

technical field [0001] The present invention relates to the technical field of high-precision clock synchronization, in particular to an edge computing server design method for multi-strategy high-precision clock synchronization. Background technique [0002] In the 21st century, mankind has officially entered the information age. Facing the challenge of information explosion, the development of infrastructure such as network communication, server design and construction has become an important means to promote information development. With the emergence of 5G services, edge computing servers face new challenges in the field of clock synchronization. When building information networks in 5G, LTE and other business fields, clock synchronization is an important guarantee for high-speed and accurate communication of information. If there is no guarantee of clock synchronization, the clocks of each terminal device cannot be synchronized, which will result in the loss of data an...

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Problems solved by technology

[0007]1) The clock synchronization scheme is single, and the time stamp information can only be obtained through the network for synchronization. The clock synchronization method based on the IEEE1588PTP protocol cannot obtain asymmetric delay and is not defined recovery from the clock

In fact, each synchronization method has its own disadvantages. The synchronization method based on the network clock protocol reduces the accuracy when it is congested. The clock synchronization method based on GNSS (Global Navigation Satellite System) is easily disturbed by the environment and has a short period.

[0008]2) Most servers use IEEE 1588 chips for clock synchronization, which increases the difficulty of design and debugging, and increases R&D and investment costs. In addition, the server's network card calculation and data The processing function is generally relatively powerful, and clock synchronization processing and time stamp information transmission can be performed through the network card and PCIe link

[0009]3) When relying on the network card for clock synchronization, the accuracy is relatively low. How to perform network card clock calibration is an important challenge for adapting 5G edge servers

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