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Novel SiC GTO device with double base regions and double emitter regions

A double-emitter, double-base technology, applied in the direction of semiconductor devices, electrical components, thyristors, etc., can solve the problems of reducing gate current stability, reducing device current gain, and low emitter injection efficiency, so as to achieve small driving current, Reduced on-resistance and large current gain

Pending Publication Date: 2021-01-29
HUNAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, as a current-driven device, SiC GTO requires a higher drive current and thus a higher drive power
There are defects on the surface of the base region of SiC GTO, which concentrates the current on the surface, resulting in the loss of part of the driving current, so a larger driving current is required, which further increases the required driving power and brings greater challenges to the driving circuit. , and reduces the stability of the gate current
In addition, the emitter injection efficiency is low, which will greatly reduce the current gain of the device, reduce the conduction characteristics of the device, and increase the requirements for driving current

Method used

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  • Novel SiC GTO device with double base regions and double emitter regions
  • Novel SiC GTO device with double base regions and double emitter regions
  • Novel SiC GTO device with double base regions and double emitter regions

Examples

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Embodiment 1

[0024] like figure 2 As shown, a new type of SiC GTO device with double base and double emitters, vertically from the anode to the cathode includes: P+ emitter 1, N-type base 2, P-type drift region 3, P-type buffer 4 and N+ type substrate 5; and the P+ emitter region 1 is connected to the device anode, the N-type base region 2 is connected to the device gate, and the N+ type substrate 5 is connected to the device cathode; the P+ emitter region 1 has a one-layer structure in the vertical direction; the N-type The base region 2 has a two-layer structure vertically, including a low-concentration doped base region 21 in contact with the P+ emitter region 1 and a high-concentration doped base region 22 in contact with the P-type drift region 3 .

[0025] In this embodiment, the concentration of the highly doped base region 22 is 1e16cm -3 .

[0026] In this embodiment, the low concentration doped base region 21 has a concentration of 3e15cm -3 .

[0027] For the SiC GTO device...

Embodiment 2

[0029] like figure 2 As shown, a new type of SiC GTO device with double base and double emitters, vertically from the anode to the cathode includes: P+ emitter 1, N-type base 2, P-type drift region 3, P-type buffer 4 and N+ type substrate 5; and the P+ emitter region 1 is connected to the device anode, the N-type base region 2 is connected to the device gate, and the N+ type substrate 5 is connected to the device cathode; the P+ emitter region 1 has a one-layer structure in the vertical direction; the N-type The base region 2 has a two-layer structure vertically, including a low-concentration doped base region 21 in contact with the P+ emitter region 1 and a high-concentration doped base region 22 in contact with the P-type drift region 3 .

[0030] In this embodiment, the concentration of the highly doped base region 22 is 5e17cm -3 .

[0031] In this embodiment, the low concentration doped base region 21 has a concentration of 1e15cm -3 .

Embodiment 3

[0033] like image 3 As shown, a new type of SiC GTO device with double base and double emitters, vertically from the anode to the cathode includes: P+ emitter 1, N-type base 2, P-type drift region 3, P-type buffer 4 and N+ type substrate 5; and the P+ emitter region 1 is connected to the device anode, the N-type base region 2 is connected to the device gate, and the N+ type substrate 5 is connected to the device cathode; the N-type base region 2 has a one-layer structure in the vertical direction; P+ The emitter region 1 has a two-layer structure in the longitudinal direction, including a P+ emitter region 12 in contact with the N-type base region 3 and a P++ emitter region 11 in contact with the anode.

[0034] In this embodiment, the doping concentration of the P+ emitter region 12 is 1e19cm -3 .

[0035] In this embodiment, the doping concentration of the P++ emitter region 11 is 1e20cm -3 .

[0036] The SiC GTO anode region is used as the emitter region of the PNP typ...

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Abstract

The invention discloses a novel SiC GTO device with double base regions and double emitter regions. The novel SiC GTO device sequentially comprises a P+ emitter region, an N-type base region, a P-typedrift region, a P-type buffer region and an N+-type substrate from an anode to a cathode in the vertical direction. The P+ emitter region is connected with a device anode, the N-type base region is connected with the device gate pole, and the N+ type substrate is connected with a device cathode; the N-type base region is of at least one layer structure in the longitudinal direction; and the P+ emitter region has at least one layer of structure in the longitudinal direction. The device has the advantages of high injection efficiency, large current gain, high gate pole current stability, smallrequired driving current, small driving power and the like, and is suitable for high-voltage and high-pulse current application occasions.

Description

technical field [0001] The invention belongs to the technical field of power electronic devices, in particular to a novel SiCGTO device with double base regions and double emitter regions. Background technique [0002] The rapid development of modern power electronics technology has realized the efficient utilization of electric energy, which plays a vital role in promoting the development of science, technology and economy. Since the beginning of the 21st century, power electronics technology has played a central role in smart grids and new energy, DC transmission, electric vehicles, and high-speed railways, and has made great contributions to the goal of energy conservation and emission reduction. each field. Power electronic devices are an important basis for the development of power electronics technology, and are the core components of power electronics technology for power conversion and control. [0003] After decades of development, power electronic devices have gr...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/74H01L29/744H01L29/06
CPCH01L29/7424H01L29/744H01L29/0603H01L29/0615H01L29/0684
Inventor 王俊梁世维邓雯娟刘航志俞恒裕
Owner HUNAN UNIV
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