Electric vehicle BMS front-end acquisition chip surge test method and device

Abstract

The invention provides an electric vehicle BMS front-end acquisition chip surge test method and device, the test device comprises a resonance part and a control part, the resonance part is connected in series with the control part, the resonance part comprises a power battery module, an inductor L and a capacitor C1, the control part comprises a forward test part and a reverse test part, the forward test part and the reverse test part are connected in parallel, the test method comprises an acquisition chip dormant state test method and an acquisition chip working state test method. One deviceis used for carrying out port anti-surge test on a plurality of voltage acquisition ports and equalization ports at the same time, and the operation is convenient; anti-surge test can be carried out in both the working state and the dormant state of the acquisition chip, and the test result is closer to the real working condition of the battery module; besides, the number of test ports can be flexibly changed by increasing the number of cells and inductors in the device, the application range is wide, and the test cost is low.

Description

technical field [0001] The invention relates to the field of chip testing of electric vehicles, in particular to a method and device for testing surges of BMS front-end acquisition chips of electric vehicles. Background technique [0002] With the vigorous development of electric vehicles in the field of new energy, the reliability of BMS of electric vehicles has been paid more and more attention. The reliability of single voltage acquisition has become an increasingly prominent problem. It is particularly important to carry out stress tests and reliability tests on BMS. It is necessary to test the anti-surge capability of the port of the voltage acquisition chip. [0003] The current general test method is: when the chip is not powered on, inject a pulse voltage into each port of the chip for testing, but in this case it is difficult to perform a withstand voltage test on the port of the chip when the chip is working; and in the acquisition channel In many scenarios, a lot...

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Problems solved by technology

[0003]The current general test method is: when the chip is not powered on, inject a pulse voltage into each port of the chip for testing, but this situation is difficult to work on the chip Under normal circumstances, the withstand voltage test is performed on the port of the chip; and in the case of many acquisition channels, a lot of pulse voltage test equipment is required, and it is necessary to spend a high cost to purchase equipment, which will seriously increase the test cost

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