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serdes with jitter injection self-stress mechanism

A stress and control signal technology, applied in the direction of wired transmission system, forward error control, line transmission components, etc., can solve problems such as difficult to distinguish, BER index statistical properties fluctuations, etc.

Active Publication Date: 2021-11-09
HUAWEI TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Second, when measured over a short period of time, the BER metric can fluctuate due to its statistical nature, making it difficult to distinguish between two configurations that produce similar BER

Method used

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Examples

Experimental program
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Embodiment Construction

[0035] This disclosure describes example devices and methods that enable self-stress checking in SerDes receivers using jitter injection.

[0036] As discussed in the background section above, self-stress checking can be used in SerdDes, especially those operating on low-loss channels, for speed and accuracy or BER-based power and system optimization. While previous approaches have always relied on jitter injection on the transmit side, the currently described example uses jitter injection self-stress checking techniques on the receive side of the SerDes instead. This approach has the potential to avoid the disadvantages of the prior art discussed in the background section.

[0037] SerDes receivers provide an enhanced mechanism for accelerating metrics collection by injecting jitter into the received data signal. In the example described, the stress is in the form of modulated jitter injected into the clock that samples the incoming signal. Injection is done through a clock...

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PUM

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Abstract

The present invention provides an apparatus and method for performing high frequency jitter self-stress checking on a receiver to aid in optimization. Dither is injected into the clock signal recovered from the received data signal and used to sample the data signal. The injected jitter increases the bit error rate (BER), making BER a more useful and faster optimization metric in applications using low-noise communication links. Error correction is used to maintain an acceptable output BER while self-stress checking is in progress.

Description

[0001] Related Applications Cross Application [0002] This application claims the benefit of priority of US Patent Application Serial No. 16 / 011,206, filed June 18, 2018, the contents of which are incorporated herein by reference. technical field [0003] This disclosure relates to Serializer-Deserializers (SerDes). In particular, the present disclosure relates to methods and systems for optimizing system parameters in SerDes. Background technique [0004] A serializer-deserializer (SerDes or SERDES) is a pair of functional blocks that are used between two systems on a limited input / output link between said two systems, such as two application-specific integrated circuits (ASIC) for high-speed communication. Typically, each system will include at least one SerDes transmitter and at least one SerDes receiver, thereby allowing two-way communication, but some such SerDes will only use the transmitter on the first system and only the receiver on the second system . [0005]...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04B3/46
CPCH04L1/0047H04L1/203H03M9/00H04L1/205H04B3/462H04L25/03012H04L1/0042H04L1/0058H04L43/087H04L1/0072H04L1/0045
Inventor 埃胡德·尼尔亨利·王佩塔尔·依万诺夫·克罗特涅夫
Owner HUAWEI TECH CO LTD