Light emitting diode epitaxial wafer and preparation method thereof

A technology for light-emitting diodes and epitaxial wafers, applied in electrical components, circuits, semiconductor devices, etc., can solve the problems of low luminous efficiency, multiple defects and leakage channels of light-emitting diode epitaxial wafers

Active Publication Date: 2021-02-12
HC SEMITEK ZHEJIANG CO LTD
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  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

[0004] However, there is a large lattice mismatch and piezoelectric polarization effect between the InGaN well layer and the GaN barrier layer, resulting in more defects and leakage channels in the multi-quantum well layer, resulting in the final light-emitting diode epitaxial wafer low luminous efficiency

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  • Light emitting diode epitaxial wafer and preparation method thereof
  • Light emitting diode epitaxial wafer and preparation method thereof
  • Light emitting diode epitaxial wafer and preparation method thereof

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Embodiment Construction

[0029] In order to make the purpose, technical solution and advantages of the present disclosure clearer, the implementation manners of the present disclosure will be further described in detail below in conjunction with the accompanying drawings.

[0030] figure 1 It is a schematic structural diagram of a light-emitting diode epitaxial wafer provided by an embodiment of the present disclosure. Refer to figure 1 It can be seen that the embodiment of the present disclosure provides a light-emitting diode epitaxial wafer, which includes a substrate 1 and an n-type GaN layer 2, a multi-quantum well layer 3, and a p-type GaN layer 4 sequentially stacked on the substrate 1 .

[0031] The multi-quantum well layer 3 includes alternately stacked well layers 31 and barrier layers 32. The well layer 31 includes a first BInGaN sub-well layer 311, a first InGaN sub-well layer 312, and an InN sub-well layer sequentially stacked along the growth direction of the light-emitting diode epitax...

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Abstract

The invention discloses a light emitting diode epitaxial wafer and a preparation method thereof, which belong to the field of light emitting diode manufacturing. The well layer in the multi-quantum well layer comprises a first BInGaN sub-well layer, a first InGaN sub-well layer, an InN sub-well layer, a second InGaN sub-well layer and a second BInGaN sub-well layer which are sequentially stacked in the growth direction of the light emitting diode epitaxial wafer. More electrons are captured in the middle of the well layer, the migration rate of the electrons is reduced, and carriers are distributed more uniformly. The barrier layer comprises a first BInGaN sub-barrier layer, a first BGaN sub-barrier layer, a BN sub-barrier layer, a second BGaN sub-barrier layer and a second BInGaN sub-barrier layer which are sequentially stacked in the growth direction of the light emitting diode epitaxial wafer. Good transition is performed between the barrier layer and the well layer through the BInGaN material so that defects caused by lattice mismatch between the well layers and the barrier layers can be reduced, crystal quality of the well layers and the barrier layers can be enhanced and finally luminous efficiency of the light emitting diode can be enhanced.

Description

technical field [0001] The disclosure relates to the field of light-emitting diode fabrication, in particular to a light-emitting diode epitaxial wafer and a preparation method thereof. Background technique [0002] A light emitting diode is a semiconductor electronic component that emits light. As an efficient, environmentally friendly and green new solid-state lighting source, it is being rapidly and widely used, such as traffic lights, car interior and exterior lights, urban landscape lighting, mobile phone backlight, etc. Improving the luminous efficiency of chips is the goal that LEDs are constantly pursuing. [0003] In the related art, an epitaxial wafer of a light emitting diode usually includes a substrate and an n-type GaN layer, a multi-quantum well layer and a p-type GaN layer grown sequentially on the substrate. In the related art, the multi-quantum well layer usually includes alternately stacked InGaN well layers and GaN barrier layers. [0004] However, ther...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L33/06H01L33/32H01L33/00
CPCH01L33/06H01L33/32H01L33/007
Inventor 洪威威王倩梅劲董彬忠吕蒙普
Owner HC SEMITEK ZHEJIANG CO LTD
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