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Method for forming photoetching alignment pattern in back-end process

A lithography alignment and process technology, which is applied in the direction of optics, pattern surface photolithography, semiconductor/solid device components, etc., can solve the problems of poor alignment accuracy of lithography, stuck grinding by-products, etc. To achieve the effect of improving the alignment of lithography

Inactive Publication Date: 2021-02-26
HUA HONG SEMICON WUXI LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] This application provides a method for forming a photolithography alignment pattern in the back-end process, which can solve the problem of the formation method of the photolithography alignment pattern in the back-end process provided in the related art because there is a high probability that the photolithography alignment pattern Poor lithographic alignment caused by grinding by-products stuck in the trenches

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  • Method for forming photoetching alignment pattern in back-end process
  • Method for forming photoetching alignment pattern in back-end process
  • Method for forming photoetching alignment pattern in back-end process

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Embodiment Construction

[0027] The technical solutions in this application will be clearly and completely described below in conjunction with the accompanying drawings. Apparently, the described embodiments are part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the scope of protection of this application.

[0028] In the description of this application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer" etc. The indicated orientation or positional relationship is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the referred device or element must have a specific orientation, use a specific orientati...

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Abstract

The invention discloses a method for forming a photoetching alignment pattern in a back-end process, and the method comprises the steps: carrying out the planarization processing through a CMP technology, and removing a metal layer at a preset depth, wherein the metal layer is formed on a barrier layer, the barrier layer is formed on the surfaces of a dielectric layer and a groove, the dielectriclayer is formed on a substrate, the groove is formed in the dielectric layer, and the groove corresponds to the alignment pattern in a photoetching process; performing ashing treatment through a photoresist removing machine to remove by-products generated in the planarization treatment process; and etching to remove the dielectric layer and the barrier layer outside the groove. According to the method provided by the invention, the by-product in the CMP process is removed by ashing, so that the problem that the subsequent photoetching process is influenced due to the reaction by-product in thetrench in the related technology is solved, and the photoetching alignment degree in the back-end process is improved.

Description

technical field [0001] The present application relates to the technical field of semiconductor manufacturing, and in particular to a method for forming a photolithographic alignment mark (alignment mark) in a back end of line (BEOL) process. Background technique [0002] In the back-end process of semiconductor manufacturing, through holes for metal wiring are usually etched in the dielectric layer, the first metal layer is filled, and then the first metal layer is planarized. The metal layer in the through hole forms a metal connection. line, and then form the second metal layer to realize the interconnection of the upper and lower metal layers. Wherein, the photolithographic alignment pattern and the metal wiring are formed in the same process. [0003] refer to figure 1 , which shows a schematic cross-sectional view after planarization by a chemical mechanical polishing (CMP) process in the back-end process provided in the related art. Such as figure 1 As shown, a die...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/544H01L21/02G03F9/00
CPCH01L23/544H01L21/02074G03F9/7003H01L2223/54426
Inventor 张超逸梁金娥冯秦旭郭莉莉吴建荣
Owner HUA HONG SEMICON WUXI LTD