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Semiconductor structure and forming method thereof

A semiconductor and patterning technology, which is applied in the direction of semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., can solve the problems of poor control ability of the gate structure on the channel and difficult channel, so as to reduce the difficulty of the process, The effect of meeting the process requirements and increasing the process window

Pending Publication Date: 2021-03-05
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, as the channel length of the device is shortened, the distance between the source and the drain of the device is also shortened, so the ability of the gate structure to control the channel becomes worse, and the gate voltage pinches off the channel. The difficulty of the channel is also increasing, making the phenomenon of subthreshold leakage (subthreshold leakage), the so-called short-channel effect (SCE: short-channel effects) more likely to occur

Method used

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  • Semiconductor structure and forming method thereof
  • Semiconductor structure and forming method thereof
  • Semiconductor structure and forming method thereof

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Embodiment Construction

[0013] Currently formed devices still suffer from poor performance. The reasons for the poor performance of the device are analyzed in conjunction with a method of forming a semiconductor structure.

[0014] refer to Figure 1 to Figure 5 , shows a structural schematic diagram corresponding to each step in a method for forming a semiconductor structure.

[0015] refer to figure 1 , providing a substrate 1 ; forming a plurality of discrete spacers on the substrate 1 , the spacers include mask spacers 2 and dummy mask spacers 3 .

[0016] refer to figure 2 , forming a mask layer 4 on the substrate 1 , the mask layer 4 has an opening 5 , and the opening 5 exposes the top of the dummy mask spacer 3 .

[0017] refer to image 3 , using the mask layer 4 as a mask to remove the dummy mask spacer 3 .

[0018] refer to Figure 4 , removing the mask layer 4 .

[0019] refer to Figure 5 After the mask layer 4 is removed, the substrate 1 is patterned by using the mask spacer 2 ...

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Abstract

The invention discloses a semiconductor structure and a forming method thereof. The forming method comprises the steps: providing a substrate; forming a plurality of discrete side walls on the substrate, wherein the discrete side walls comprise mask side walls and pseudo mask side walls; forming a protective layer covering the side walls and the tops of the side walls on the substrate; after the protective layer is formed, forming a mask layer on the substrate, wherein the mask layer is provided with an opening, and the opening exposes the protection layer at the top of each pseudo mask side wall; removing the protective layer at the top of each pseudo mask side wall exposed out of the opening; removing the pseudo mask side walls by taking the mask layer and the protective layer as masks;removing the mask layer and the protective layer; and patterning the substrate by taking the mask side walls as masks. According to the embodiment of the invention, the protective layer can play a role in protecting the mask side walls in the step of removing the pseudo mask side wall, so that the mask side walls are prevented from being damaged, and the limitation of the mask side wall on the process of removing the pseudo mask side wall is reduced through the protection layer, so that the process window of removing the pseudo mask side wall is enlarged.

Description

technical field [0001] Embodiments of the present invention relate to the field of semiconductor manufacturing, and in particular, to a semiconductor structure and a method for forming the same. Background technique [0002] In semiconductor manufacturing, with the development trend of ultra-large-scale integrated circuits, the feature size of integrated circuits continues to decrease. In order to adapt to smaller feature sizes, metal-oxide-semiconductor field-effect transistors (Metal-Oxide-Semiconductor Field-Effect Transistor , MOSFET) channel length has been shortened accordingly. However, as the channel length of the device is shortened, the distance between the source and the drain of the device is also shortened, so the ability of the gate structure to control the channel becomes worse, and the gate voltage pinches off the channel. The channel becomes more and more difficult, making subthreshold leakage (subthreshold leakage), the so-called short-channel effect (SCE:...

Claims

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Application Information

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IPC IPC(8): H01L21/308H01L29/10
CPCH01L29/1033H01L21/3086H01L21/3083
Inventor 郑二虎赵振阳
Owner SEMICON MFG INT (SHANGHAI) CORP