Semiconductor Structure Fabrication Method

Abstract

The invention relates to a method for manufacturing a semiconductor structure, comprising: providing a substrate with a plurality of discrete conductive layers; forming a precursor layer covering the top and sidewalls of the conductive layer on the substrate; performing pre-oxidation treatment on the precursor layer, converting the precursor layer higher than the top of the conductive layer into a first barrier layer; then, annealing the precursor layer below the first barrier layer in an oxygen-containing atmosphere, generating gas in the precursor layer to form a multi- A porous isolation layer. In the embodiment of the present invention, by forming the first barrier layer, during the annealing process, the oxygen-containing gas penetrates into the precursor layer through the first barrier layer, and the first barrier layer can prevent the discharge of the gas generated by the oxidation of the precursor layer, so that the precursor The material layer is transformed into a porous isolation layer with higher pore density and larger pore volume, which reduces the dielectric constant of the isolation layer material, thereby reducing the interconnection delay effect of the semiconductor structure and increasing the signal transmission speed.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for manufacturing a semiconductor structure. Background technique [0002] At present, in the field of semiconductor technology, semiconductors are moving towards ultra-deep submicron, and the size of semiconductor structures is also becoming smaller and smaller. With the reduction of the size of the semiconductor structure, the cross-section and line spacing of the interconnection leads are also correspondingly reduced, which makes the interconnection delay effect more serious, and correspondingly causes the operating speed of the semiconductor structure to slow down. [0003] In order to solve the problem of interconnection delay effect, low-k dielectric material is usually used as the material of the isolation layer between adjacent conductive layers. At present, a porous isolation layer is usually provided between adjacent conductive layers, and the isolation...

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Problems solved by technology

[0004] However, in the existing process flow, the number of pores in the formed porous isolation layer is too small and the volume is too small, resulting in a high dielectric constant of the porous isolation layer, which cannot adapt to the current development of smaller and smaller semiconductor structures. trend

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