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A bidirectional deburring circuit

A deburring and circuit technology, which is applied in the direction of electric pulse generator circuit, electrical components, electric pulse generation, etc., can solve the problem of increasing the chip area of ​​the circuit, and achieve the effect of strict deburring action and saving chip area

Active Publication Date: 2021-08-10
上海海栎创科技股份有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Theoretically, strict bidirectional deburring action can be realized, but this inevitably increases the chip area of ​​the circuit compared to the digital unilateral deburring circuit

Method used

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  • A bidirectional deburring circuit
  • A bidirectional deburring circuit
  • A bidirectional deburring circuit

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0028] This embodiment takes a timer composed of three D flip-flops as an example. The timer in this embodiment is a 3-bit counter, and the implementation of the bidirectional deburring circuit is as follows: Figure 5 shown.

[0029] The circuit of this embodiment is mainly divided into a timer, an XOR gate, an AND gate, and a D flip-flop D for saving the output state. 0 .

[0030] The timer is formed by a 2-frequency divider composed of three D flip-flops in series. Specifically, the D terminal of the previous D flip-flop is connected to its own Q non-terminal, and the Q non-terminal is connected to the CLK terminal of the next D flip-flop. .

[0031] The first input terminals of the XOR gate all input the signal IN, and the second input terminals are connected to the D flip-flop D 0 The Q terminals of the timers are respectively connected to the R terminals of each D flip-flop in the timer.

[0032] The AND gate is composed of a NAND gate and a first inverter. Specifica...

Embodiment 2

[0040] This embodiment takes a timer composed of N D flip-flops as an example. The timer in this embodiment is an N-bit counter, and the implementation of the bidirectional deburring circuit is as follows: Figure 6 shown.

[0041] The difference between this embodiment and Embodiment 1 lies in the difference of the timer, other parts can refer to the description of Embodiment 1.

Embodiment 3

[0043] This embodiment discloses a bidirectional deburring circuit, which can be implemented on the basis of Embodiment 1 or 2, as follows:

[0044] Assuming Sel_Initial_State=0, the initial state of output OUT is 0, so that the initial state of output OUT is 0;

[0045] When the input signal IN is low, the output of the XOR gate is 0, the R terminals of the D flip-flops in the N-bit counter are all 0, the N-bit counter does not work, and the Q-terminal outputs of the N D flip-flops are all 0. The output signal Z=0 of the NOT gate and the first inverter, at this time, the signal input to the clock terminal 1 of the first D flip-flop in the N-bit counter will not be shielded.

[0046] When the input signal IN is high, the output of the XOR gate is 1, and the R terminals of the D flip-flops in the N-bit counter are all 1, and the N-bit counter starts to work. Since before this, all Q-terminal outputs are 0, after The output signal Z=0 of the NAND gate and the first inverter, at...

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Abstract

The present invention relates to the technical field of integrated circuits, in particular to a bidirectional deburring circuit, which includes a D flip-flop and a D flip-flop D that saves the output state. 0 , an exclusive OR gate, an AND gate formed by a NAND gate and a first inverter, a frequency divider formed by a D flip-flop, and a plurality of frequency dividers connected in series to form a timer; the D flip-flop D 0 It is a D flip-flop with a reset / set function; when the input signal IN remains at a high level within 6 to 7 CLK clock cycles, the output is at a high level, and the input signal IN remains at a low level. Then the output is low level, and the input signal IN does not keep low / high level, then the output remains unchanged from the previous state. The invention realizes the bidirectional deburring action on the input signal. Compared with the traditional solution, the deburring action is more strict and accurate, and also saves the chip area.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a bidirectional deburring circuit. Background technique [0002] In electronic products, the internal state of some chips is often detected, and then various appropriate control and protections are performed on the chip based on the state information, such as various over-temperature protection, over-voltage protection, over-current protection, and under-voltage protection. , Short circuit protection, etc. However, due to the natural existence of some noise or other disturbances outside or inside the chip, some noise signals will inevitably be superimposed on the detected signal, and sometimes the detected output state information will be flipped back and forth. The information undergoes a deburring process, thereby filtering out the influence of various interference sources on the detection state. [0003] Traditional deburring circuits are mostly digital unilatera...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03K3/012H03K3/02
CPCH03K3/012H03K3/02
Inventor 杨敏苏丹
Owner 上海海栎创科技股份有限公司
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