Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

FPGA hardware implementation method and device based on Bayesian resampling particle filtering and a target tracking method

A technology of particle filtering and hardware implementation, applied to digital computer components, architecture with a single central processing unit, instruments, etc., can solve problems such as low parallelism of multi-core CPUs, limited speed-up ratio, time waste, etc.

Active Publication Date: 2021-04-30
HUNAN NORMAL UNIVERSITY
View PDF7 Cites 3 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Multi-core CPUs have low parallelism and are not suitable for highly intensive computing tasks such as particle filtering; existing GPU-based particle filter accelerators spend most of their time on resampling steps, and because particle filtering needs to generate a large number of random numbers, and There are a large number of branch structures, which are not suitable for GPU computing, making the speedup ratio very limited; FPGA can have pipeline parallelism and data parallelism at the same time, and can design highly customized hardware architecture, so it is very suitable for particle filter algorithm acceleration
However, the existing FPGA-based particle filter accelerators mostly focus on the traditional resampling algorithm and simplification of the algorithm, which will affect the particle filter effect and are not suitable for application scenarios with a large number of particles.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • FPGA hardware implementation method and device based on Bayesian resampling particle filtering and a target tracking method
  • FPGA hardware implementation method and device based on Bayesian resampling particle filtering and a target tracking method
  • FPGA hardware implementation method and device based on Bayesian resampling particle filtering and a target tracking method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0027] The following is a detailed description of the embodiments of the present invention. This embodiment is carried out based on the technical solution of the present invention, and provides detailed implementation methods and specific operation processes to further explain the technical solution of the present invention.

[0028] The embodiment of the present invention provides a kind of FPGA hardware implementation method based on Bayesian resampling of particle filtering, wherein FPGA such as Figure 4 As shown, including: a calculation module, a pseudo-random permutation generator, n random number generators, n particle cache blocks, n weight cache blocks, n index cache blocks and observation value cache blocks, the calculation module includes There are n particle sampling units, n weight updating units and n Bayesian resampling units in one-to-one correspondence between input and output; the FPGA hardware implementation method specifically includes the following steps: ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses an FPGA hardware implementation method and device based on Bayesian resampling particle filtering and a target tracking method. The FPGA hardware implementation method comprises the steps that a particle sampling unit reads old particles from a particle cache block, receives random numbers from a random number generator, and samples and updates the read old particles in parallel; a weight updating unit reads the observed value, performs weight calculation on the updated particles in parallel, and stores the generated weight into a weight cache block; the Bayesian resampling unit adopts a Bayesian resampling method, performs resampling in parallel according to all weight values in the weight cache blocks, and stores index output values back to the corresponding index cache blocks; the pseudo-random arrangement generator reads the address of a new particle from the index cache block and randomly allocates the new particle to each particle cache block to achieve exchange in particle parallel computing; and the steps are circularly executed until iteration of all the time steps is completed, and state estimation of the system is completed. According to the invention, the calculation speed of the particle filtering system can be improved.

Description

technical field [0001] The invention belongs to the field of nonlinear filtering of electronic technology, and in particular relates to an FPGA hardware implementation method, device and target tracking method of particle filtering based on Bayesian resampling. Background technique [0002] Particle Filter (PF: Particle Filter), also known as Sequential Monte Carlo method (SMC: Sequential MonteCarlo), is a non-linear filtering method based on Bayesian sampling estimation of sequence importance sampling, which uses the randomness of the posterior probability density function The set of sampling points and the corresponding weight values ​​represent the changes of the state vector. Thus breaking through the theoretical framework of the Kalman filter and the limitations of the Gaussian system, it can be applied to any form of state-space model (State-SpaceModel). Particle filter algorithm can solve almost any nonlinear filtering problem, and is widely used in economic statisti...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): G06F15/78
CPCG06F15/7871
Inventor 刘双龙
Owner HUNAN NORMAL UNIVERSITY
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products