Coarse-grained dynamic reconfigurable processor and data processing method thereof

A data processing and processor technology, applied in the direction of electrical digital data processing, architecture with a single central processing unit, instruments, etc., can solve the problems that cannot satisfy general hardware programming flexibility, high computing performance and high energy efficiency at the same time
CN112732639AActive Publication Date: 2021-04-30NANJING UNIV
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Patent Information

Authority / Receiving Office
CN · China
Current Assignee / Owner
NANJING UNIV
Publication Date
2021-04-30

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Abstract

The invention relates to a coarse-grained dynamic reconfigurable processor and a data processing method thereof. The coarse-grained dynamic reconfigurable processor comprises a control unit for analyzing configuration information, a reconfigurable control unit used for receiving the configuration information analyzed by the control unit; an on-chip storage pool composed of a plurality of on-chip storage blocks; a conflict-free address generator used for generating memory access addresses of the on-chip storage blocks; a direct storage access module; and a data distribution module located between the direct storage access module and a storage pool. Through two-stage configuration, configuration information prefetching, second-stage partial configuration and the like, quick dynamic switching between the next operator and the current operator can be realized; meanwhile, by means of a reconfigurable computing array, a conflict-free address generator and the like which are optimally designed, high-performance and high-energy-efficiency operator implementation can be achieved.
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Description

Technical field

[0001] The present invention relates to the field of integrated circuits, and more particularly to a coarse granular dynamic reconfigurable processor and a data processing method thereof.Background technique

[0002] The conventional computing chip architecture that performs a specific application can be divided into two major categories: common calculations and dedicated calculations.

[0003] The core of common calculations is the general processor GPP (General PurposeProcessor) driven by the instruction drive. The traditional GPP uses the Von Neumann structure, including storage units, arithmetic units, control units, input units, and output units. The operation of the entire system is completely controlled by program instructions, so different algorithms can be achieved by different instructions, so it has high flexibility and versatility, which can reduce costs. However, due to the implementation of the instructions, the GPP implementation algorithm is slower (the main fr...

Claims

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