Interconnection die interface management system and initialization method thereof

Abstract

The invention relates to bare core interface management, in particular to an interconnection bare core interface management system and an initialization method thereof. The interconnection bare core interface management system comprises a CMU system, a JTAG-Die interface and a configuration network, wherein the JTAG-Die interface and the configuration network are connected with the CMU system; the CMU system comprises a CMU processor and a Flash connected with the CMU processor, and the Flash is used for storing software codes of the CMU system; the JTAG-Die interface is used for controlling the CMU program to start; one end of the configuration network is connected with the CMU processor in an external form, and the other end of the configuration network is connected to each to-be-configured interface through an independent bus; and the CMU processor is used for transmitting configuration data to the function register of each to-be-configured interface through the configuration network and the independent bus when executing a configuration program of the CMU processor so as to realize configuration of an interface address translation table. According to the system, the processor is used for realizing system initialization configuration, hardware configuration of an interface is converted into software programming, the design difficulty is reduced, the development process is simplified, the configuration flexibility is enhanced, and the system building speed is increased.

Description

technical field [0001] The invention relates to a bare core interface management system, in particular to an interconnected bare core interface management system and an initialization method thereof. Background technique [0002] With the development of digital integrated circuits, system-on-chip (System on Chip, SoC, referring to the integration of multiple functional modules on the same silicon chip) has almost become a necessary solution to realize high-performance systems. Manufacturers continue to expand the scale of SoC To meet the needs of users for product performance. However, limited by processing technology and other factors, Moore's Law (that is, the law that the number of transistors that can be accommodated on an integrated circuit doubles every 24 months) is gradually failing, which makes it impossible to expand the scale of integrated circuits on a single silicon chip. Costs and development cycles become extremely high. [0003] The interconnection die is a...

AI Technical Summary

Problems solved by technology

However, the design of the state machine belongs to the category of hardware design. Its design is difficult, the process is complicated, and the reconstruction takes a long time, which is not conducive to the rapid construction of the system.

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